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e9885aa7cc
Add sckc driver compatible with common clock framework. Driver implements slow clock support for SAM9X60 compatible IPs (in this list it is also present SAMA7G5's slow clock IP). Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
172 lines
4 KiB
C
172 lines
4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Slow clock support for AT91 architectures.
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*
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* Copyright (C) 2020 Microchip Technology Inc. and its subsidiaries
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*
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* Author: Claudiu Beznea <claudiu.beznea@microchip.com>
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*/
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#include <common.h>
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#include <clk-uclass.h>
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#include <dm.h>
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#include <dt-bindings/clk/at91.h>
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#include <linux/clk-provider.h>
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#include "pmc.h"
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#define UBOOT_DM_CLK_AT91_SAM9X60_TD_SLCK "at91-sam9x60-td-slck"
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#define UBOOT_DM_CLK_AT91_SCKC "at91-sckc"
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#define AT91_OSC_SEL BIT(24)
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#define AT91_OSC_SEL_SHIFT (24)
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struct sam9x60_sckc {
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void __iomem *reg;
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const char **parent_names;
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unsigned int num_parents;
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struct clk clk;
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};
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#define to_sam9x60_sckc(c) container_of(c, struct sam9x60_sckc, clk)
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static int sam9x60_sckc_of_xlate(struct clk *clk,
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struct ofnode_phandle_args *args)
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{
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if (args->args_count != 1) {
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debug("AT91: SCKC: Invalid args_count: %d\n", args->args_count);
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return -EINVAL;
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}
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clk->id = AT91_TO_CLK_ID(PMC_TYPE_SLOW, args->args[0]);
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return 0;
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}
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static const struct clk_ops sam9x60_sckc_ops = {
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.of_xlate = sam9x60_sckc_of_xlate,
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.get_rate = clk_generic_get_rate,
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};
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static int sam9x60_td_slck_set_parent(struct clk *clk, struct clk *parent)
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{
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struct sam9x60_sckc *sckc = to_sam9x60_sckc(clk);
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u32 i;
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for (i = 0; i < sckc->num_parents; i++) {
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if (!strcmp(parent->dev->name, sckc->parent_names[i]))
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break;
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}
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if (i == sckc->num_parents)
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return -EINVAL;
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pmc_update_bits(sckc->reg, 0, AT91_OSC_SEL, (i << AT91_OSC_SEL_SHIFT));
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return 0;
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}
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static const struct clk_ops sam9x60_td_slck_ops = {
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.get_rate = clk_generic_get_rate,
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.set_parent = sam9x60_td_slck_set_parent,
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};
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static struct clk *at91_sam9x60_clk_register_td_slck(struct sam9x60_sckc *sckc,
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const char *name, const char * const *parent_names,
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int num_parents)
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{
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struct clk *clk;
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int ret = -ENOMEM;
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u32 val, i;
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if (!sckc || !name || !parent_names || num_parents != 2)
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return ERR_PTR(-EINVAL);
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sckc->parent_names = kzalloc(sizeof(*sckc->parent_names) * num_parents,
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GFP_KERNEL);
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if (!sckc->parent_names)
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return ERR_PTR(ret);
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for (i = 0; i < num_parents; i++) {
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sckc->parent_names[i] = kmemdup(parent_names[i],
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strlen(parent_names[i]) + 1, GFP_KERNEL);
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if (!sckc->parent_names[i])
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goto free;
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}
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sckc->num_parents = num_parents;
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pmc_read(sckc->reg, 0, &val);
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val = (val & AT91_OSC_SEL) >> AT91_OSC_SEL_SHIFT;
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clk = &sckc->clk;
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ret = clk_register(clk, UBOOT_DM_CLK_AT91_SAM9X60_TD_SLCK, name,
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parent_names[val]);
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if (ret)
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goto free;
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return clk;
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free:
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for (; i >= 0; i--)
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kfree(sckc->parent_names[i]);
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kfree(sckc->parent_names);
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return ERR_PTR(ret);
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}
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U_BOOT_DRIVER(at91_sam9x60_td_slck) = {
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.name = UBOOT_DM_CLK_AT91_SAM9X60_TD_SLCK,
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.id = UCLASS_CLK,
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.ops = &sam9x60_td_slck_ops,
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.flags = DM_FLAG_PRE_RELOC,
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};
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static int at91_sam9x60_sckc_probe(struct udevice *dev)
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{
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struct sam9x60_sckc *sckc = dev_get_priv(dev);
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void __iomem *base = (void *)devfdt_get_addr(dev);
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const char *slow_rc_osc, *slow_osc;
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const char *parents[2];
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struct clk *clk, c;
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int ret;
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ret = clk_get_by_index(dev, 0, &c);
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if (ret)
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return ret;
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slow_rc_osc = clk_hw_get_name(&c);
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ret = clk_get_by_index(dev, 1, &c);
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if (ret)
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return ret;
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slow_osc = clk_hw_get_name(&c);
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clk = clk_register_fixed_factor(NULL, "md_slck", slow_rc_osc, 0, 1, 1);
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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clk_dm(AT91_TO_CLK_ID(PMC_TYPE_SLOW, 0), clk);
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parents[0] = slow_rc_osc;
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parents[1] = slow_osc;
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sckc[1].reg = base;
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clk = at91_sam9x60_clk_register_td_slck(&sckc[1], "td_slck",
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parents, 2);
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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clk_dm(AT91_TO_CLK_ID(PMC_TYPE_SLOW, 1), clk);
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return 0;
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}
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static const struct udevice_id sam9x60_sckc_ids[] = {
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{ .compatible = "microchip,sam9x60-sckc" },
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{ /* Sentinel. */ },
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};
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U_BOOT_DRIVER(at91_sckc) = {
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.name = UBOOT_DM_CLK_AT91_SCKC,
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.id = UCLASS_CLK,
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.of_match = sam9x60_sckc_ids,
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.priv_auto_alloc_size = sizeof(struct sam9x60_sckc) * 2,
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.ops = &sam9x60_sckc_ops,
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.probe = at91_sam9x60_sckc_probe,
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.flags = DM_FLAG_PRE_RELOC,
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};
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