mirror of
https://github.com/AsahiLinux/u-boot
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174d728471
Update my and DPs email address to match current setup. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/aba5b19b9c5a95608829e86ad5cc4671c940f1bb.1688992543.git.michal.simek@amd.com
63 lines
939 B
Text
63 lines
939 B
Text
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2013 - 2014 Xilinx, Inc
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*
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* Michal Simek <michal.simek@amd.com>
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*/
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#include <asm-offsets.h>
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OUTPUT_ARCH(microblaze)
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ENTRY(_start)
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SECTIONS
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{
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.text ALIGN(0x4):
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{
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__text_start = .;
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arch/microblaze/cpu/start.o (.text)
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*(.text)
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*(.text.*)
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__text_end = .;
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}
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.rodata ALIGN(0x4):
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{
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__rodata_start = .;
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*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
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__rodata_end = .;
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}
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.data ALIGN(0x4):
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{
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__data_start = .;
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*(.data)
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*(.data.*)
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__data_end = .;
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}
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. = ALIGN(4);
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__u_boot_list : {
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KEEP(*(SORT(__u_boot_list*)));
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}
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__init_end = . ;
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.bss ALIGN(0x4):
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{
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__bss_start = .;
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*(.sbss)
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*(.scommon)
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*(.bss)
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*(.bss.*)
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*(COMMON)
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. = ALIGN(4);
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__bss_end = .;
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}
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_end = . ;
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_image_binary_end = .;
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}
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#if defined(CONFIG_SPL_MAX_FOOTPRINT)
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ASSERT(_end - _start <= (CONFIG_SPL_MAX_FOOTPRINT), \
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"SPL image plus BSS too big");
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#endif
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