Conor Dooley 3f3527044d riscv: dts: fix the mpfs's reference clock frequency ... The initial devicetree for PolarFire SoC incorrectly created a fixed frequency clock in the devicetree to represent the msspll, but the msspll is not a fixed frequency clock. The actual reference clock on a board is either 125 or 100 MHz, 125 MHz in the case of the icicle kit. Swap the incorrect representation of the msspll out for the actual reference clock. Fixes: dd4ee416a6 ("riscv: dts: Add device tree for Microchip Icicle Kit") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>		2022-11-15 15:37:17 +08:00
..
ae350-u-boot.dtsi	riscv: Rename Andes PLIC to PLICSW	2022-11-03 13:27:56 +08:00
ae350_32.dts	riscv: Rename Andes PLIC to PLICSW	2022-11-03 13:27:56 +08:00
ae350_64.dts	riscv: Rename Andes PLIC to PLICSW	2022-11-03 13:27:56 +08:00
binman.dtsi	Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE	2022-10-31 11:01:31 -04:00
fu540-c000-u-boot.dtsi	riscv: fu540: dts: Correct reg size of clint node	2020-10-26 10:01:37 +08:00
fu540-c000.dtsi	riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux	2020-06-04 09:44:09 +08:00
fu540-hifive-unleashed-a00-ddr.dtsi	sifive: dts: fu540: Add DDR controller and phy register settings	2020-06-04 09:44:08 +08:00
fu740-c000-u-boot.dtsi	dt-bindings: clock: sifive: sync FU740 PRCI clock binding header	2022-09-06 13:00:15 +08:00
fu740-c000.dtsi	riscv: dts: sifive: Synchronize FU740 and Unmatched DT	2022-09-06 13:00:41 +08:00
fu740-hifive-unmatched-a00-ddr.dtsi	riscv: dts: add SiFive Unmatched board support	2021-05-31 16:35:54 +08:00
hifive-unleashed-a00-u-boot.dtsi	riscv: sifive: unleashed: Switch to use binman to generate u-boot.itb	2021-05-19 17:01:50 +08:00
hifive-unleashed-a00.dts	riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux	2020-06-04 09:44:09 +08:00
hifive-unmatched-a00-u-boot.dtsi	riscv: Support booting SiFive Unmatched from SPI.	2021-12-02 16:43:56 +08:00
hifive-unmatched-a00.dts	riscv: dts: sifive: Synchronize FU740 and Unmatched DT	2022-09-06 13:00:41 +08:00
k210-maix-bit.dts	k210: use the board vendor name rather than the marketing name	2022-03-15 17:43:11 +08:00
k210.dtsi	k210: dts: align plic node with Linux	2022-03-15 17:43:11 +08:00
Makefile	dts: automatically build necessary .dtb files	2022-02-09 12:26:12 -07:00
microchip-mpfs-icicle-kit-u-boot.dtsi	riscv: dts: Add device tree for Microchip Icicle Kit	2021-01-18 11:06:38 +08:00
microchip-mpfs-icicle-kit.dts	riscv: dts: fix the mpfs's reference clock frequency	2022-11-15 15:37:17 +08:00
microchip-mpfs.dtsi	riscv: dts: fix the mpfs's reference clock frequency	2022-11-15 15:37:17 +08:00
openpiton-riscv64.dts	riscv: dts: add OpenPiton RISC-V board dts support	2021-07-07 20:34:02 +08:00
qemu-virt32.dts	riscv: qemu: Split devicetree files for qemu_riscv32/64	2021-12-23 10:24:39 -05:00
qemu-virt64.dts	riscv: qemu: Split devicetree files for qemu_riscv32/64	2021-12-23 10:24:39 -05:00