York Sun 316f0d0f8f powerpc: mpc85xx: Fix static TLB table for SDRAM ... Most predefined TLB tables don't have memory coherence bit set for SDRAM. This wasn't an issue before invalidate_dcache_range() function was enabled. Without the coherence bit, dcache invalidation doesn't automatically flush the cache. The coherence bit is already set when dynamic TLB table is used. For some boards with different SPL boot method, or with legacy fixed setting, this bit needs to be set in TLB files. Signed-off-by: York Sun <york.sun@nxp.com>		2017-12-06 14:54:12 -08:00
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controlcenterd-id.c	env: Rename getenv_hex(), getenv_yesno(), getenv_ulong()	2017-08-16 08:30:32 -04:00
controlcenterd-id.h	Add more SPDX-License-Identifier tags	2016-01-19 08:31:21 -05:00
controlcenterd.c	env: Rename some other getenv()-related functions	2017-08-16 08:31:11 -04:00
ddr.c	Add more SPDX-License-Identifier tags	2016-01-19 08:31:21 -05:00
diu.c	Add more SPDX-License-Identifier tags	2016-01-19 08:31:21 -05:00
Kconfig	kconfig: remove redundant "string" type in arch and board Kconfigs	2014-09-13 16:43:55 -04:00
law.c	Add more SPDX-License-Identifier tags	2016-01-19 08:31:21 -05:00
MAINTAINERS	Add board MAINTAINERS files	2014-07-30 08:48:06 -04:00
Makefile	Various Makefiles: Add SPDX-License-Identifier tags	2015-11-10 09:19:52 -05:00
sdhc_boot.c	block: pass block dev not num to read/write/erase()	2016-01-13 21:05:18 -05:00
tlb.c	powerpc: mpc85xx: Fix static TLB table for SDRAM	2017-12-06 14:54:12 -08:00