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https://github.com/AsahiLinux/u-boot
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114c86d826
For ARM architecture, enable the CONFIG_USE_ARCH_MEMSET/MEMCPY, will highly increase the memset/memcpy performance. This is able thanks to the ARM multiple register instructions. Unfortunatelly the relocation is done without the cache enabled, so it takes some time, but zeroing the BSS memory takes much more longer, especially for the configs with big static buffers. A quick test confirms, that the boot time improvement after using the arch memcpy for relocation has no significant meaning. The same test confirms that enable the memset for zeroing BSS, reduces the boot time. So this patch enables the arch memset for zeroing the BSS after the relocation process. For ARM boards, this can be enabled in board configs by defining: 'CONFIG_USE_ARCH_MEMSET'. This was tested on Trats2. A quick test with trace. Boot time from start to main_loop() entry: - ~1384ms - before this change - ~888ms - after this change Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> |
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| .. | ||
| _ashldi3.S | ||
| _ashrdi3.S | ||
| _divsi3.S | ||
| _lshrdi3.S | ||
| _modsi3.S | ||
| _udivsi3.S | ||
| _umodsi3.S | ||
| asm-offsets.c | ||
| board.c | ||
| bootm-fdt.c | ||
| bootm.c | ||
| cache-cp15.c | ||
| cache-pl310.c | ||
| cache.c | ||
| crt0.S | ||
| crt0_64.S | ||
| debug.S | ||
| div0.c | ||
| eabi_compat.c | ||
| gic_64.S | ||
| interrupts.c | ||
| interrupts_64.c | ||
| Makefile | ||
| memcpy.S | ||
| memset.S | ||
| relocate.S | ||
| relocate_64.S | ||
| reset.c | ||
| sections.c | ||
| semihosting.c | ||
| spl.c | ||
| stack.c | ||
| vectors.S | ||