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https://github.com/AsahiLinux/u-boot
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898e7610c6
Add trivial driver for i.MX8MP HSIOMIX handling. This is responsible for enabling the GPCv2 power domains and clock for USB 3.0 and PCIe in the correct order. Currently supported is the USB 3.0 part which can be tested, PCIe support should be easy to add. Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
159 lines
3.6 KiB
C
159 lines
3.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2022 Marek Vasut <marex@denx.de>
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <clk.h>
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#include <dm.h>
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#include <dm/device.h>
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#include <dm/device_compat.h>
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#include <power-domain-uclass.h>
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#include <dt-bindings/power/imx8mp-power.h>
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#define GPR_REG0 0x0
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#define PCIE_CLOCK_MODULE_EN BIT(0)
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#define USB_CLOCK_MODULE_EN BIT(1)
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struct imx8mp_hsiomix_priv {
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void __iomem *base;
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struct clk clk_usb;
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struct power_domain pd_bus;
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struct power_domain pd_usb;
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struct power_domain pd_usb_phy1;
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struct power_domain pd_usb_phy2;
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};
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static int imx8mp_hsiomix_on(struct power_domain *power_domain)
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{
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struct udevice *dev = power_domain->dev;
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struct imx8mp_hsiomix_priv *priv = dev_get_priv(dev);
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struct power_domain *domain;
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int ret;
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ret = power_domain_on(&priv->pd_bus);
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if (ret)
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return ret;
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if (power_domain->id == IMX8MP_HSIOBLK_PD_USB) {
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domain = &priv->pd_usb;
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} else if (power_domain->id == IMX8MP_HSIOBLK_PD_USB_PHY1) {
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domain = &priv->pd_usb_phy1;
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} else if (power_domain->id == IMX8MP_HSIOBLK_PD_USB_PHY2) {
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domain = &priv->pd_usb_phy2;
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} else {
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ret = -EINVAL;
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goto err_pd;
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}
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ret = power_domain_on(domain);
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if (ret)
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goto err_pd;
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ret = clk_enable(&priv->clk_usb);
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if (ret)
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goto err_clk;
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if (power_domain->id == IMX8MP_HSIOBLK_PD_USB)
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setbits_le32(priv->base + GPR_REG0, USB_CLOCK_MODULE_EN);
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return 0;
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err_clk:
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power_domain_off(domain);
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err_pd:
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power_domain_off(&priv->pd_bus);
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return ret;
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}
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static int imx8mp_hsiomix_off(struct power_domain *power_domain)
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{
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struct udevice *dev = power_domain->dev;
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struct imx8mp_hsiomix_priv *priv = dev_get_priv(dev);
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if (power_domain->id == IMX8MP_HSIOBLK_PD_USB)
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clrbits_le32(priv->base + GPR_REG0, USB_CLOCK_MODULE_EN);
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clk_disable(&priv->clk_usb);
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if (power_domain->id == IMX8MP_HSIOBLK_PD_USB)
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power_domain_off(&priv->pd_usb);
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else if (power_domain->id == IMX8MP_HSIOBLK_PD_USB_PHY1)
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power_domain_off(&priv->pd_usb_phy1);
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else if (power_domain->id == IMX8MP_HSIOBLK_PD_USB_PHY2)
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power_domain_off(&priv->pd_usb_phy2);
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power_domain_off(&priv->pd_bus);
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return 0;
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}
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static int imx8mp_hsiomix_of_xlate(struct power_domain *power_domain,
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struct ofnode_phandle_args *args)
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{
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power_domain->id = args->args[0];
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return 0;
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}
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static int imx8mp_hsiomix_probe(struct udevice *dev)
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{
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struct imx8mp_hsiomix_priv *priv = dev_get_priv(dev);
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int ret;
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priv->base = dev_read_addr_ptr(dev);
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ret = clk_get_by_name(dev, "usb", &priv->clk_usb);
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if (ret < 0)
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return ret;
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ret = power_domain_get_by_name(dev, &priv->pd_bus, "bus");
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if (ret < 0)
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goto err_pd_bus;
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ret = power_domain_get_by_name(dev, &priv->pd_usb, "usb");
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if (ret < 0)
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goto err_pd_usb;
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ret = power_domain_get_by_name(dev, &priv->pd_usb_phy1, "usb-phy1");
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if (ret < 0)
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goto err_pd_usb_phy1;
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ret = power_domain_get_by_name(dev, &priv->pd_usb_phy2, "usb-phy2");
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if (ret < 0)
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goto err_pd_usb_phy2;
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return 0;
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err_pd_usb_phy2:
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power_domain_free(&priv->pd_usb_phy1);
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err_pd_usb_phy1:
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power_domain_free(&priv->pd_usb);
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err_pd_usb:
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power_domain_free(&priv->pd_bus);
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err_pd_bus:
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clk_free(&priv->clk_usb);
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return ret;
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}
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static const struct udevice_id imx8mp_hsiomix_ids[] = {
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{ .compatible = "fsl,imx8mp-hsio-blk-ctrl" },
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{ }
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};
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struct power_domain_ops imx8mp_hsiomix_ops = {
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.on = imx8mp_hsiomix_on,
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.off = imx8mp_hsiomix_off,
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.of_xlate = imx8mp_hsiomix_of_xlate,
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};
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U_BOOT_DRIVER(imx8mp_hsiomix) = {
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.name = "imx8mp_hsiomix",
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.id = UCLASS_POWER_DOMAIN,
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.of_match = imx8mp_hsiomix_ids,
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.probe = imx8mp_hsiomix_probe,
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.priv_auto = sizeof(struct imx8mp_hsiomix_priv),
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.ops = &imx8mp_hsiomix_ops,
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};
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