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4345998ae9
At present all emulated sandbox pci devices must be present in the device tree in order to be used. The real world pci uclass driver supports pci device driver matching, and we should add such support on sandbox too. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
137 lines
3.2 KiB
C
137 lines
3.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2014 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*/
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#include <common.h>
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#include <dm.h>
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#include <fdtdec.h>
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#include <inttypes.h>
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#include <pci.h>
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#define FDT_DEV_INFO_CELLS 4
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#define FDT_DEV_INFO_SIZE (FDT_DEV_INFO_CELLS * sizeof(u32))
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#define SANDBOX_PCI_DEVFN(d, f) ((d << 3) | f)
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struct sandbox_pci_priv {
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struct {
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u16 vendor;
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u16 device;
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} vendev[256];
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};
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static int sandbox_pci_write_config(struct udevice *bus, pci_dev_t devfn,
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uint offset, ulong value,
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enum pci_size_t size)
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{
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struct dm_pci_emul_ops *ops;
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struct udevice *container, *emul;
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int ret;
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ret = sandbox_pci_get_emul(bus, devfn, &container, &emul);
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if (ret)
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return ret == -ENODEV ? 0 : ret;
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ops = pci_get_emul_ops(emul);
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if (!ops || !ops->write_config)
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return -ENOSYS;
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return ops->write_config(emul, offset, value, size);
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}
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static int sandbox_pci_read_config(struct udevice *bus, pci_dev_t devfn,
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uint offset, ulong *valuep,
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enum pci_size_t size)
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{
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struct dm_pci_emul_ops *ops;
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struct udevice *container, *emul;
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struct sandbox_pci_priv *priv = dev_get_priv(bus);
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int ret;
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/* Prepare the default response */
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*valuep = pci_get_ff(size);
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ret = sandbox_pci_get_emul(bus, devfn, &container, &emul);
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if (ret) {
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if (!container) {
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u16 vendor, device;
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devfn = SANDBOX_PCI_DEVFN(PCI_DEV(devfn),
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PCI_FUNC(devfn));
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vendor = priv->vendev[devfn].vendor;
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device = priv->vendev[devfn].device;
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if (offset == PCI_VENDOR_ID && vendor)
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*valuep = vendor;
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else if (offset == PCI_DEVICE_ID && device)
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*valuep = device;
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return 0;
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} else {
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return ret == -ENODEV ? 0 : ret;
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}
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}
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ops = pci_get_emul_ops(emul);
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if (!ops || !ops->read_config)
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return -ENOSYS;
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return ops->read_config(emul, offset, valuep, size);
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}
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static int sandbox_pci_probe(struct udevice *dev)
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{
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struct sandbox_pci_priv *priv = dev_get_priv(dev);
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const fdt32_t *cell;
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u8 pdev, pfn, devfn;
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int len;
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cell = ofnode_get_property(dev_ofnode(dev), "sandbox,dev-info", &len);
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if (!cell)
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return 0;
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if ((len % FDT_DEV_INFO_SIZE) == 0) {
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int num = len / FDT_DEV_INFO_SIZE;
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int i;
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for (i = 0; i < num; i++) {
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debug("dev info #%d: %02x %02x %04x %04x\n", i,
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fdt32_to_cpu(cell[0]), fdt32_to_cpu(cell[1]),
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fdt32_to_cpu(cell[2]), fdt32_to_cpu(cell[3]));
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pdev = fdt32_to_cpu(cell[0]);
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pfn = fdt32_to_cpu(cell[1]);
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if (pdev > 31 || pfn > 7)
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continue;
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devfn = SANDBOX_PCI_DEVFN(pdev, pfn);
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priv->vendev[devfn].vendor = fdt32_to_cpu(cell[2]);
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priv->vendev[devfn].device = fdt32_to_cpu(cell[3]);
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cell += FDT_DEV_INFO_CELLS;
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}
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}
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return 0;
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}
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static const struct dm_pci_ops sandbox_pci_ops = {
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.read_config = sandbox_pci_read_config,
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.write_config = sandbox_pci_write_config,
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};
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static const struct udevice_id sandbox_pci_ids[] = {
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{ .compatible = "sandbox,pci" },
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{ }
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};
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U_BOOT_DRIVER(pci_sandbox) = {
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.name = "pci_sandbox",
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.id = UCLASS_PCI,
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.of_match = sandbox_pci_ids,
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.ops = &sandbox_pci_ops,
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.probe = sandbox_pci_probe,
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.priv_auto_alloc_size = sizeof(struct sandbox_pci_priv),
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/* Attach an emulator if we can */
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.child_post_bind = dm_scan_fdt_dev,
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.per_child_platdata_auto_alloc_size =
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sizeof(struct pci_child_platdata),
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};
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