mirror of
https://github.com/AsahiLinux/u-boot
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484 lines
12 KiB
C
484 lines
12 KiB
C
/*
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* Driver for the i2c controller on the Marvell line of host bridges
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* (e.g, gt642[46]0, mv643[46]0, mv644[46]0, Orion SoC family),
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* and Kirkwood family.
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*
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* Based on:
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* Author: Mark A. Greer <mgreer@mvista.com>
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*
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* 2005 (c) MontaVista, Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*
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* ported from Linux to u-boot
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* (C) Copyright 2009
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* Heiko Schocher, DENX Software Engineering, hs@denx.de.
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*
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*/
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#include <common.h>
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#include <i2c.h>
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#include <asm/arch/kirkwood.h>
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#include <asm/errno.h>
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#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0;
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#if defined(CONFIG_I2C_MUX)
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static unsigned int i2c_bus_num_mux __attribute__ ((section ("data"))) = 0;
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#endif
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/* Register defines */
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#define KW_I2C_REG_SLAVE_ADDR 0x00
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#define KW_I2C_REG_DATA 0x04
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#define KW_I2C_REG_CONTROL 0x08
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#define KW_I2C_REG_STATUS 0x0c
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#define KW_I2C_REG_BAUD 0x0c
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#define KW_I2C_REG_EXT_SLAVE_ADDR 0x10
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#define KW_I2C_REG_SOFT_RESET 0x1c
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#define KW_I2C_REG_CONTROL_ACK 0x00000004
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#define KW_I2C_REG_CONTROL_IFLG 0x00000008
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#define KW_I2C_REG_CONTROL_STOP 0x00000010
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#define KW_I2C_REG_CONTROL_START 0x00000020
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#define KW_I2C_REG_CONTROL_TWSIEN 0x00000040
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#define KW_I2C_REG_CONTROL_INTEN 0x00000080
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/* Ctlr status values */
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#define KW_I2C_STATUS_BUS_ERR 0x00
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#define KW_I2C_STATUS_MAST_START 0x08
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#define KW_I2C_STATUS_MAST_REPEAT_START 0x10
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#define KW_I2C_STATUS_MAST_WR_ADDR_ACK 0x18
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#define KW_I2C_STATUS_MAST_WR_ADDR_NO_ACK 0x20
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#define KW_I2C_STATUS_MAST_WR_ACK 0x28
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#define KW_I2C_STATUS_MAST_WR_NO_ACK 0x30
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#define KW_I2C_STATUS_MAST_LOST_ARB 0x38
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#define KW_I2C_STATUS_MAST_RD_ADDR_ACK 0x40
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#define KW_I2C_STATUS_MAST_RD_ADDR_NO_ACK 0x48
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#define KW_I2C_STATUS_MAST_RD_DATA_ACK 0x50
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#define KW_I2C_STATUS_MAST_RD_DATA_NO_ACK 0x58
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#define KW_I2C_STATUS_MAST_WR_ADDR_2_ACK 0xd0
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#define KW_I2C_STATUS_MAST_WR_ADDR_2_NO_ACK 0xd8
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#define KW_I2C_STATUS_MAST_RD_ADDR_2_ACK 0xe0
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#define KW_I2C_STATUS_MAST_RD_ADDR_2_NO_ACK 0xe8
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#define KW_I2C_STATUS_NO_STATUS 0xf8
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/* Driver states */
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enum {
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KW_I2C_STATE_INVALID,
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KW_I2C_STATE_IDLE,
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KW_I2C_STATE_WAITING_FOR_START_COND,
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KW_I2C_STATE_WAITING_FOR_ADDR_1_ACK,
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KW_I2C_STATE_WAITING_FOR_ADDR_2_ACK,
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KW_I2C_STATE_WAITING_FOR_SLAVE_ACK,
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KW_I2C_STATE_WAITING_FOR_SLAVE_DATA,
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};
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/* Driver actions */
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enum {
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KW_I2C_ACTION_INVALID,
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KW_I2C_ACTION_CONTINUE,
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KW_I2C_ACTION_SEND_START,
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KW_I2C_ACTION_SEND_ADDR_1,
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KW_I2C_ACTION_SEND_ADDR_2,
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KW_I2C_ACTION_SEND_DATA,
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KW_I2C_ACTION_RCV_DATA,
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KW_I2C_ACTION_RCV_DATA_STOP,
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KW_I2C_ACTION_SEND_STOP,
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};
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/* defines to get compatible with Linux driver */
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#define IRQ_NONE 0x0
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#define IRQ_HANDLED 0x01
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#define I2C_M_TEN 0x01
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#define I2C_M_RD 0x02
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#define I2C_M_REV_DIR_ADDR 0x04;
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struct i2c_msg {
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u32 addr;
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u32 flags;
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u8 *buf;
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u32 len;
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};
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struct kirkwood_i2c_data {
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int irq;
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u32 state;
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u32 action;
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u32 aborting;
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u32 cntl_bits;
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void *reg_base;
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u32 reg_base_p;
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u32 reg_size;
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u32 addr1;
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u32 addr2;
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u32 bytes_left;
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u32 byte_posn;
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u32 block;
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int rc;
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u32 freq_m;
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u32 freq_n;
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struct i2c_msg *msg;
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};
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static struct kirkwood_i2c_data __drv_data __attribute__ ((section (".data")));
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static struct kirkwood_i2c_data *drv_data = &__drv_data;
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static struct i2c_msg __i2c_msg __attribute__ ((section (".data")));
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static struct i2c_msg *kirkwood_i2c_msg = &__i2c_msg;
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/*
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*****************************************************************************
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*
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* Finite State Machine & Interrupt Routines
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*
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*****************************************************************************
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*/
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static inline int abs(int n)
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{
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if(n >= 0)
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return n;
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else
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return n * -1;
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}
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static void kirkwood_calculate_speed(int speed)
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{
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int calcspeed;
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int diff;
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int best_diff = CONFIG_SYS_TCLK;
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int best_speed = 0;
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int m, n;
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int tmp[8] = {2, 4, 8, 16, 32, 64, 128, 256};
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for (n = 0; n < 8; n++) {
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for (m = 0; m < 16; m++) {
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calcspeed = CONFIG_SYS_TCLK / (10 * (m + 1) * tmp[n]);
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diff = abs((speed - calcspeed));
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if ( diff < best_diff) {
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best_diff = diff;
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best_speed = calcspeed;
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drv_data->freq_m = m;
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drv_data->freq_n = n;
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}
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}
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}
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}
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/* Reset hardware and initialize FSM */
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static void
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kirkwood_i2c_hw_init(int speed, int slaveadd)
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{
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drv_data->state = KW_I2C_STATE_IDLE;
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kirkwood_calculate_speed(speed);
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writel(0, CONFIG_I2C_KW_REG_BASE + KW_I2C_REG_SOFT_RESET);
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writel((((drv_data->freq_m & 0xf) << 3) | (drv_data->freq_n & 0x7)),
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CONFIG_I2C_KW_REG_BASE + KW_I2C_REG_BAUD);
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writel(slaveadd, CONFIG_I2C_KW_REG_BASE + KW_I2C_REG_SLAVE_ADDR);
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writel(0, CONFIG_I2C_KW_REG_BASE + KW_I2C_REG_EXT_SLAVE_ADDR);
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writel(KW_I2C_REG_CONTROL_TWSIEN | KW_I2C_REG_CONTROL_STOP,
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CONFIG_I2C_KW_REG_BASE + KW_I2C_REG_CONTROL);
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}
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static void
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kirkwood_i2c_fsm(u32 status)
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{
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/*
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* If state is idle, then this is likely the remnants of an old
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* operation that driver has given up on or the user has killed.
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* If so, issue the stop condition and go to idle.
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*/
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if (drv_data->state == KW_I2C_STATE_IDLE) {
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drv_data->action = KW_I2C_ACTION_SEND_STOP;
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return;
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}
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/* The status from the ctlr [mostly] tells us what to do next */
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switch (status) {
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/* Start condition interrupt */
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case KW_I2C_STATUS_MAST_START: /* 0x08 */
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case KW_I2C_STATUS_MAST_REPEAT_START: /* 0x10 */
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drv_data->action = KW_I2C_ACTION_SEND_ADDR_1;
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drv_data->state = KW_I2C_STATE_WAITING_FOR_ADDR_1_ACK;
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break;
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/* Performing a write */
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case KW_I2C_STATUS_MAST_WR_ADDR_ACK: /* 0x18 */
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if (drv_data->msg->flags & I2C_M_TEN) {
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drv_data->action = KW_I2C_ACTION_SEND_ADDR_2;
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drv_data->state =
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KW_I2C_STATE_WAITING_FOR_ADDR_2_ACK;
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break;
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}
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/* FALLTHRU */
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case KW_I2C_STATUS_MAST_WR_ADDR_2_ACK: /* 0xd0 */
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case KW_I2C_STATUS_MAST_WR_ACK: /* 0x28 */
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if ((drv_data->bytes_left == 0)
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|| (drv_data->aborting
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&& (drv_data->byte_posn != 0))) {
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drv_data->action = KW_I2C_ACTION_SEND_STOP;
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drv_data->state = KW_I2C_STATE_IDLE;
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} else {
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drv_data->action = KW_I2C_ACTION_SEND_DATA;
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drv_data->state =
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KW_I2C_STATE_WAITING_FOR_SLAVE_ACK;
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drv_data->bytes_left--;
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}
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break;
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/* Performing a read */
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case KW_I2C_STATUS_MAST_RD_ADDR_ACK: /* 40 */
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if (drv_data->msg->flags & I2C_M_TEN) {
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drv_data->action = KW_I2C_ACTION_SEND_ADDR_2;
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drv_data->state =
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KW_I2C_STATE_WAITING_FOR_ADDR_2_ACK;
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break;
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}
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/* FALLTHRU */
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case KW_I2C_STATUS_MAST_RD_ADDR_2_ACK: /* 0xe0 */
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if (drv_data->bytes_left == 0) {
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drv_data->action = KW_I2C_ACTION_SEND_STOP;
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drv_data->state = KW_I2C_STATE_IDLE;
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break;
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}
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/* FALLTHRU */
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case KW_I2C_STATUS_MAST_RD_DATA_ACK: /* 0x50 */
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if (status != KW_I2C_STATUS_MAST_RD_DATA_ACK)
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drv_data->action = KW_I2C_ACTION_CONTINUE;
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else {
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drv_data->action = KW_I2C_ACTION_RCV_DATA;
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drv_data->bytes_left--;
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}
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drv_data->state = KW_I2C_STATE_WAITING_FOR_SLAVE_DATA;
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if ((drv_data->bytes_left == 1) || drv_data->aborting)
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drv_data->cntl_bits &= ~KW_I2C_REG_CONTROL_ACK;
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break;
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case KW_I2C_STATUS_MAST_RD_DATA_NO_ACK: /* 0x58 */
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drv_data->action = KW_I2C_ACTION_RCV_DATA_STOP;
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drv_data->state = KW_I2C_STATE_IDLE;
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break;
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case KW_I2C_STATUS_MAST_WR_ADDR_NO_ACK: /* 0x20 */
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case KW_I2C_STATUS_MAST_WR_NO_ACK: /* 30 */
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case KW_I2C_STATUS_MAST_RD_ADDR_NO_ACK: /* 48 */
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/* Doesn't seem to be a device at other end */
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drv_data->action = KW_I2C_ACTION_SEND_STOP;
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drv_data->state = KW_I2C_STATE_IDLE;
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drv_data->rc = -ENODEV;
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break;
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default:
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printf("kirkwood_i2c_fsm: Ctlr Error -- state: 0x%x, "
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"status: 0x%x, addr: 0x%x, flags: 0x%x\n",
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drv_data->state, status, drv_data->msg->addr,
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drv_data->msg->flags);
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drv_data->action = KW_I2C_ACTION_SEND_STOP;
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kirkwood_i2c_hw_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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drv_data->rc = -EIO;
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}
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}
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static void
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kirkwood_i2c_do_action(void)
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{
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switch(drv_data->action) {
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case KW_I2C_ACTION_CONTINUE:
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writel(drv_data->cntl_bits,
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CONFIG_I2C_KW_REG_BASE + KW_I2C_REG_CONTROL);
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break;
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case KW_I2C_ACTION_SEND_START:
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writel(drv_data->cntl_bits | KW_I2C_REG_CONTROL_START,
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CONFIG_I2C_KW_REG_BASE + KW_I2C_REG_CONTROL);
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break;
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case KW_I2C_ACTION_SEND_ADDR_1:
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writel(drv_data->addr1,
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CONFIG_I2C_KW_REG_BASE + KW_I2C_REG_DATA);
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writel(drv_data->cntl_bits,
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CONFIG_I2C_KW_REG_BASE + KW_I2C_REG_CONTROL);
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break;
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case KW_I2C_ACTION_SEND_ADDR_2:
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writel(drv_data->addr2,
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CONFIG_I2C_KW_REG_BASE + KW_I2C_REG_DATA);
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writel(drv_data->cntl_bits,
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CONFIG_I2C_KW_REG_BASE + KW_I2C_REG_CONTROL);
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break;
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case KW_I2C_ACTION_SEND_DATA:
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writel(drv_data->msg->buf[drv_data->byte_posn++],
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CONFIG_I2C_KW_REG_BASE + KW_I2C_REG_DATA);
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writel(drv_data->cntl_bits,
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CONFIG_I2C_KW_REG_BASE + KW_I2C_REG_CONTROL);
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break;
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case KW_I2C_ACTION_RCV_DATA:
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drv_data->msg->buf[drv_data->byte_posn++] =
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readl(CONFIG_I2C_KW_REG_BASE + KW_I2C_REG_DATA);
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writel(drv_data->cntl_bits,
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CONFIG_I2C_KW_REG_BASE + KW_I2C_REG_CONTROL);
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break;
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case KW_I2C_ACTION_RCV_DATA_STOP:
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drv_data->msg->buf[drv_data->byte_posn++] =
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readl(CONFIG_I2C_KW_REG_BASE + KW_I2C_REG_DATA);
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drv_data->cntl_bits &= ~KW_I2C_REG_CONTROL_INTEN;
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writel(drv_data->cntl_bits | KW_I2C_REG_CONTROL_STOP,
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CONFIG_I2C_KW_REG_BASE + KW_I2C_REG_CONTROL);
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drv_data->block = 0;
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break;
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case KW_I2C_ACTION_INVALID:
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default:
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printf("kirkwood_i2c_do_action: Invalid action: %d\n",
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drv_data->action);
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drv_data->rc = -EIO;
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/* FALLTHRU */
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case KW_I2C_ACTION_SEND_STOP:
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drv_data->cntl_bits &= ~KW_I2C_REG_CONTROL_INTEN;
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writel(drv_data->cntl_bits | KW_I2C_REG_CONTROL_STOP,
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CONFIG_I2C_KW_REG_BASE + KW_I2C_REG_CONTROL);
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drv_data->block = 0;
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break;
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}
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}
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static int
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kirkwood_i2c_intr(void)
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{
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u32 status;
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u32 ctrl;
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int rc = IRQ_NONE;
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ctrl = readl(CONFIG_I2C_KW_REG_BASE + KW_I2C_REG_CONTROL);
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while ((ctrl & KW_I2C_REG_CONTROL_IFLG) &&
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(drv_data->rc == 0)) {
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status = readl(CONFIG_I2C_KW_REG_BASE + KW_I2C_REG_STATUS);
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kirkwood_i2c_fsm(status);
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kirkwood_i2c_do_action();
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rc = IRQ_HANDLED;
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ctrl = readl(CONFIG_I2C_KW_REG_BASE + KW_I2C_REG_CONTROL);
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udelay(1000);
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}
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return rc;
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}
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static void
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kirkwood_i2c_doio(struct i2c_msg *msg)
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{
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int ret;
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while ((drv_data->rc == 0) && (drv_data->state != KW_I2C_STATE_IDLE)) {
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/* poll Status register */
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ret = kirkwood_i2c_intr();
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if (ret == IRQ_NONE)
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udelay(10);
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}
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}
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static void
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kirkwood_i2c_prepare_for_io(struct i2c_msg *msg)
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{
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u32 dir = 0;
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drv_data->msg = msg;
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drv_data->byte_posn = 0;
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drv_data->bytes_left = msg->len;
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drv_data->aborting = 0;
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drv_data->rc = 0;
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/* in u-boot we use no IRQs */
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drv_data->cntl_bits = KW_I2C_REG_CONTROL_ACK | KW_I2C_REG_CONTROL_TWSIEN;
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if (msg->flags & I2C_M_RD)
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dir = 1;
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if (msg->flags & I2C_M_TEN) {
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drv_data->addr1 = 0xf0 | (((u32)msg->addr & 0x300) >> 7) | dir;
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drv_data->addr2 = (u32)msg->addr & 0xff;
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} else {
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drv_data->addr1 = ((u32)msg->addr & 0x7f) << 1 | dir;
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drv_data->addr2 = 0;
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}
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/* OK, no start it (from kirkwood_i2c_execute_msg())*/
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drv_data->action = KW_I2C_ACTION_SEND_START;
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drv_data->state = KW_I2C_STATE_WAITING_FOR_START_COND;
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drv_data->block = 1;
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kirkwood_i2c_do_action();
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}
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void
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i2c_init(int speed, int slaveadd)
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{
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kirkwood_i2c_hw_init(speed, slaveadd);
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}
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int
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i2c_read(u8 dev, uint addr, int alen, u8 *data, int length)
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{
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kirkwood_i2c_msg->buf = data;
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kirkwood_i2c_msg->len = length;
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kirkwood_i2c_msg->addr = dev;
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kirkwood_i2c_msg->flags = I2C_M_RD;
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kirkwood_i2c_prepare_for_io(kirkwood_i2c_msg);
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kirkwood_i2c_doio(kirkwood_i2c_msg);
|
|
return drv_data->rc;
|
|
}
|
|
|
|
int
|
|
i2c_write(u8 dev, uint addr, int alen, u8 *data, int length)
|
|
{
|
|
kirkwood_i2c_msg->buf = data;
|
|
kirkwood_i2c_msg->len = length;
|
|
kirkwood_i2c_msg->addr = dev;
|
|
kirkwood_i2c_msg->flags = 0;
|
|
|
|
kirkwood_i2c_prepare_for_io(kirkwood_i2c_msg);
|
|
kirkwood_i2c_doio(kirkwood_i2c_msg);
|
|
return drv_data->rc;
|
|
}
|
|
|
|
int
|
|
i2c_probe(uchar chip)
|
|
{
|
|
return i2c_read(chip, 0, 0, NULL, 0);
|
|
}
|
|
|
|
int i2c_set_bus_num(unsigned int bus)
|
|
{
|
|
#if defined(CONFIG_I2C_MUX)
|
|
if (bus < CONFIG_SYS_MAX_I2C_BUS) {
|
|
i2c_bus_num = bus;
|
|
} else {
|
|
int ret;
|
|
|
|
ret = i2x_mux_select_mux(bus);
|
|
if (ret)
|
|
return ret;
|
|
i2c_bus_num = 0;
|
|
}
|
|
i2c_bus_num_mux = bus;
|
|
#else
|
|
if (bus > 0) {
|
|
return -1;
|
|
}
|
|
|
|
i2c_bus_num = bus;
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
unsigned int i2c_get_bus_num(void)
|
|
{
|
|
#if defined(CONFIG_I2C_MUX)
|
|
return i2c_bus_num_mux;
|
|
#else
|
|
return i2c_bus_num;
|
|
#endif
|
|
}
|
|
|