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Add an mxc_ocotp driver for i.MX6. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
50 lines
1.5 KiB
Text
50 lines
1.5 KiB
Text
Driver implementing the fuse API for Freescale's On-Chip OTP Controller (OCOTP)
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on MXC
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This IP can be found on the following SoCs:
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- i.MX6.
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Note that this IP is different from albeit similar to the IPs of the same name
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that can be found on the following SoCs:
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- i.MX23,
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- i.MX28,
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- i.MX50.
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The section numbers in this file refer to the i.MX6 Reference Manual.
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A fuse word contains 32 fuse bit slots, as explained in 46.2.1.
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A bank contains 8 fuse word slots, as explained in 46.2.1 and shown by the
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memory map in 46.4.
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Some fuse bit or word slots may not have the corresponding fuses actually
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implemented in the fusebox.
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See the README files of the SoCs using this driver in order to know the
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conventions used by U-Boot to store some specific data in the fuses, e.g. MAC
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addresses.
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Fuse operations:
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Read
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Read operations are implemented as read accesses to the shadow registers,
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using "Bankx Wordy" from the memory map in 46.4. This is explained in
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detail by the first two paragraphs in 46.2.1.2.
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Sense
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Sense operations are implemented as the direct fusebox read explained by
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the steps in 46.2.1.2.
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Program
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Program operations are implemented as explained by the steps in 46.2.1.3.
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Following this operation, the shadow registers are not reloaded by the
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hardware.
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Override
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Override operations are implemented as write accesses to the shadow
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registers, as explained by the first paragraph in 46.2.1.3.
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Configuration:
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CONFIG_MXC_OCOTP
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Define this to enable the mxc_ocotp driver.
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