Zhichun Hua db14f11dfe armv8/fsl-lsch3: Fix TCR_EL3 for the final MMU setup. ... When final MMU table is setup in DDR, TCR attributes must match those of the memroy for cacheability and shareability. Signed-off-by: Zhichun Hua <zhichun.hua@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>		2015-07-20 11:44:40 -07:00
..
arc	arc: significant cache rework	2015-07-01 17:17:27 +03:00
arm	armv8/fsl-lsch3: Fix TCR_EL3 for the final MMU setup.	2015-07-20 11:44:40 -07:00
avr32	avr32: delete ancient board.c	2015-06-10 14:03:26 +02:00
blackfin	arch: Make board selection choices optional	2015-05-12 18:10:02 -04:00
m68k	arch: Make board selection choices optional	2015-05-12 18:10:02 -04:00
microblaze	arch: Make board selection choices optional	2015-05-12 18:10:02 -04:00
mips	MIPS: change 'extern inline' to 'static inline'	2015-07-02 11:29:33 +02:00
nds32	arch: Make board selection choices optional	2015-05-12 18:10:02 -04:00
nios2	arch: Make board selection choices optional	2015-05-12 18:10:02 -04:00
openrisc	arch: Make board selection choices optional	2015-05-12 18:10:02 -04:00
powerpc	powerpc: gitignore: ignore PowerPC DTBs	2015-05-28 08:18:20 -04:00
sandbox	sandbox: Add an implementation for cleanup_before_linux_select()	2015-06-10 19:26:54 -06:00
sh	Move default y configs out of arch/board Kconfig	2015-06-25 22:17:55 -04:00
sparc	arch: Make board selection choices optional	2015-05-12 18:10:02 -04:00
x86	dm: x86: baytrail: Correct PCI region 3 when driver model is used	2015-07-14 18:03:19 -06:00
.gitignore	.gitignore: drop include/asm/proc from ignore pattern	2014-06-19 11:18:54 -04:00
Kconfig	ARM: disable HAVE_PRIVATE_LIBGCC for ARM64	2015-07-07 11:39:51 +02:00