u-boot/common/spl/spl_spi.c
Vaishnav Achath cd2f9031e4 spl: spl_spi: add spi_nor_remove() to soft reset flash
On probe, the SPI NOR core will put a flash in 8D mode if it
supports it. But Linux as of now expects to get the flash in
1S mode. Handing the flash to Linux in Octal DTR mode means
the kernel will fail to detect the flash.

This commit adds an option to soft reset the flash after
spl_spi_load_image() so that the flash can be reset to 1S mode
and subsequent spi-nor probe in Linux does not fail, since
spl_spi_load_image() performs spi_flash_probe() the remove is
added after completion loading images in spi_flash_probe() itself.

Tested on J721E EVM with 5.10 Linux kernel.

Linux spi-nor probe without the fix:
root@j7-evm:~# dmesg | grep spi-nor
[    4.928023] spi-nor spi0.0: unrecognized JEDEC id bytes: ff ff ff ff ff ff
[    4.934938] spi-nor: probe of spi0.0 failed with error -2

Linux spi-nor probe with the fix:
root@j7-evm:~# dmesg | grep spi-nor
[    4.904484] spi-nor spi0.0: mt35xu512aba (65536 Kbytes)

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2022-07-18 19:15:19 +05:30

185 lines
4.6 KiB
C

// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2011 OMICRON electronics GmbH
*
* based on drivers/mtd/nand/raw/nand_spl_load.c
*
* Copyright (C) 2011
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
*/
#include <common.h>
#include <image.h>
#include <log.h>
#include <spi.h>
#include <spi_flash.h>
#include <errno.h>
#include <spl.h>
#include <asm/global_data.h>
#include <dm/ofnode.h>
#if CONFIG_IS_ENABLED(OS_BOOT)
/*
* Load the kernel, check for a valid header we can parse, and if found load
* the kernel and then device tree.
*/
static int spi_load_image_os(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct spi_flash *flash,
struct image_header *header)
{
int err;
/* Read for a header, parse or error out. */
spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS, sizeof(*header),
(void *)header);
if (image_get_magic(header) != IH_MAGIC)
return -1;
err = spl_parse_image_header(spl_image, bootdev, header);
if (err)
return err;
spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS,
spl_image->size, (void *)spl_image->load_addr);
/* Read device tree. */
spi_flash_read(flash, CONFIG_SYS_SPI_ARGS_OFFS,
CONFIG_SYS_SPI_ARGS_SIZE,
(void *)CONFIG_SYS_SPL_ARGS_ADDR);
return 0;
}
#endif
static ulong spl_spi_fit_read(struct spl_load_info *load, ulong sector,
ulong count, void *buf)
{
struct spi_flash *flash = load->dev;
ulong ret;
ret = spi_flash_read(flash, sector, count, buf);
if (!ret)
return count;
else
return 0;
}
unsigned int __weak spl_spi_get_uboot_offs(struct spi_flash *flash)
{
return CONFIG_SYS_SPI_U_BOOT_OFFS;
}
u32 __weak spl_spi_boot_bus(void)
{
return CONFIG_SF_DEFAULT_BUS;
}
u32 __weak spl_spi_boot_cs(void)
{
return CONFIG_SF_DEFAULT_CS;
}
/*
* The main entry for SPI booting. It's necessary that SDRAM is already
* configured and available since this code loads the main U-Boot image
* from SPI into SDRAM and starts it from there.
*/
static int spl_spi_load_image(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev)
{
int err = 0;
unsigned int payload_offs;
struct spi_flash *flash;
struct image_header *header;
unsigned int sf_bus = spl_spi_boot_bus();
unsigned int sf_cs = spl_spi_boot_cs();
/*
* Load U-Boot image from SPI flash into RAM
* In DM mode: defaults speed and mode will be
* taken from DT when available
*/
flash = spi_flash_probe(sf_bus, sf_cs,
CONFIG_SF_DEFAULT_SPEED,
CONFIG_SF_DEFAULT_MODE);
if (!flash) {
puts("SPI probe failed.\n");
return -ENODEV;
}
payload_offs = spl_spi_get_uboot_offs(flash);
header = spl_get_load_buffer(-sizeof(*header), sizeof(*header));
if (CONFIG_IS_ENABLED(OF_REAL)) {
payload_offs = ofnode_conf_read_int("u-boot,spl-payload-offset",
payload_offs);
}
#if CONFIG_IS_ENABLED(OS_BOOT)
if (spl_start_uboot() || spi_load_image_os(spl_image, bootdev, flash, header))
#endif
{
/* Load u-boot, mkimage header is 64 bytes. */
err = spi_flash_read(flash, payload_offs, sizeof(*header),
(void *)header);
if (err) {
debug("%s: Failed to read from SPI flash (err=%d)\n",
__func__, err);
return err;
}
if (IS_ENABLED(CONFIG_SPL_LOAD_FIT_FULL) &&
image_get_magic(header) == FDT_MAGIC) {
err = spi_flash_read(flash, payload_offs,
roundup(fdt_totalsize(header), 4),
(void *)CONFIG_SYS_LOAD_ADDR);
if (err)
return err;
err = spl_parse_image_header(spl_image, bootdev,
(struct image_header *)CONFIG_SYS_LOAD_ADDR);
} else if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
image_get_magic(header) == FDT_MAGIC) {
struct spl_load_info load;
debug("Found FIT\n");
load.dev = flash;
load.priv = NULL;
load.filename = NULL;
load.bl_len = 1;
load.read = spl_spi_fit_read;
err = spl_load_simple_fit(spl_image, &load,
payload_offs,
header);
} else if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER)) {
struct spl_load_info load;
load.dev = flash;
load.priv = NULL;
load.filename = NULL;
load.bl_len = 1;
load.read = spl_spi_fit_read;
err = spl_load_imx_container(spl_image, &load,
payload_offs);
} else {
err = spl_parse_image_header(spl_image, bootdev, header);
if (err)
return err;
err = spi_flash_read(flash, payload_offs + spl_image->offset,
spl_image->size,
(void *)spl_image->load_addr);
}
if (IS_ENABLED(CONFIG_SPI_FLASH_SOFT_RESET)) {
err = spi_nor_remove(flash);
if (err)
return err;
}
}
return err;
}
/* Use priorty 1 so that boards can override this */
SPL_LOAD_IMAGE_METHOD("SPI", 1, BOOT_DEVICE_SPI, spl_spi_load_image);