mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-24 03:53:31 +00:00
2cb156e126
The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring: - LPDDR4 DRAM - eMMC FLASH - Gateworks System Controller - LTE CAT M1 modem - USB 2.0 HUB - M.2 Socket with USB2.0, PCIe, and dual-SIM - IMX8M FEC - PCIe based GbE - RS232/RS485/RS422 serial transceiver - GPS - CAN bus - WiFi / Bluetooth - MIPI header (DSI/CSI/GPIO/PWM/I2S) - PMIC To add support for the i.MX8M Nano GW7902: - Add imx8mn-venice dts/defconfig/include - Add imx8mn-gw7902 dts - Add imx8mn-2gb lpddr4 dram configs - Add misc support for IMX8M Nano SoC - rename imx8mm-venice.c to venice.c as it is no longer imx8mm specific - update README with differences for IMX8MN vs IMX8MM Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
19 lines
546 B
C
19 lines
546 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
/*
|
|
* Copyright 2021 Gateworks Corporation
|
|
*/
|
|
|
|
#ifndef __LPDDR4_TIMING_H__
|
|
#define __LPDDR4_TIMING_H__
|
|
|
|
#ifdef CONFIG_IMX8MM
|
|
extern struct dram_timing_info dram_timing_1gb;
|
|
extern struct dram_timing_info dram_timing_2gb;
|
|
extern struct dram_timing_info dram_timing_4gb;
|
|
#elif CONFIG_IMX8MN
|
|
extern struct dram_timing_info dram_timing_1gb_single_die;
|
|
extern struct dram_timing_info dram_timing_2gb_single_die;
|
|
extern struct dram_timing_info dram_timing_2gb_dual_die;
|
|
#endif
|
|
|
|
#endif /* __LPDDR4_TIMING_H__ */
|