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https://github.com/AsahiLinux/u-boot
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22b6dbc169
There is a workaround for MPC8569 CPU Errata, which needs to set Bit 13 of LBCR in 4K bootpage. We setup a temp TLB for eLBC controller in bootpage, then invalidate it after LBCR bit 13 is set. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
75 lines
2.2 KiB
Makefile
75 lines
2.2 KiB
Makefile
#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# (C) Copyright 2002,2003 Motorola Inc.
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# Xianghua Xiao,X.Xiao@motorola.com
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(CPU).a
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START = start.o resetvec.o
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SOBJS-$(CONFIG_MP) += release.o
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SOBJS = $(SOBJS-y)
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COBJS-$(CONFIG_MP) += mp.o
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COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
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# supports ddr1
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COBJS-$(CONFIG_MPC8540) += ddr-gen1.o
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COBJS-$(CONFIG_MPC8560) += ddr-gen1.o
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COBJS-$(CONFIG_MPC8541) += ddr-gen1.o
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COBJS-$(CONFIG_MPC8555) += ddr-gen1.o
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# supports ddr1/2
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COBJS-$(CONFIG_MPC8548) += ddr-gen2.o
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COBJS-$(CONFIG_MPC8568) += ddr-gen2.o
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COBJS-$(CONFIG_MPC8544) += ddr-gen2.o
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# supports ddr1/2/3
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COBJS-$(CONFIG_MPC8572) += ddr-gen3.o
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COBJS-$(CONFIG_MPC8536) += ddr-gen3.o
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COBJS-$(CONFIG_P2020) += ddr-gen3.o
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COBJS-$(CONFIG_MPC8569) += ddr-gen3.o
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COBJS-$(CONFIG_MPC8536) += mpc8536_serdes.o
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COBJS = traps.o cpu.o cpu_init.o speed.o interrupts.o tlb.o \
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pci.o serial_scc.o commproc.o ether_fcc.o qe_io.o \
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$(COBJS-y)
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SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
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START := $(addprefix $(obj),$(START))
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all: $(obj).depend $(START) $(LIB)
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$(LIB): $(OBJS)
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$(AR) $(ARFLAGS) $@ $(OBJS)
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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