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CPU: Freescale i.MX6ULL rev1.1 792 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 49C Reset cause: POR Model: Seeed NPi iMX6ULL Dev Board with NAND Board: Seeed NPi i.MX6ULL Dev Board DRAM: 512 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial@2020000 Out: serial@2020000 Err: serial@2020000 Net: FEC0 Working: - Eth0 - MMC/SD - NAND - UART 1 - USB host Signed-off-by: Navin Sankar Velliangiri <navin@linumiz.com> Note: Changes in v2: * removed unnecessary space in imx6ull-seeed-npi-imx6ull-dev-board.dts file. * Used SZ_2M for CONFIG_SYS_MALLOC_LEN size allocation. |
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Kconfig | ||
MAINTAINERS | ||
Makefile | ||
npi_imx6ull.c | ||
README | ||
spl.c |
How to use U-BOOT on SeeedStudio NPI-IMX6ULL Single Board Computer ------------------------------------------------------------------ - Configure and build U-Boot for NPI-IMX6ULL: $ export ARCH=arm $ export CROSS_COMPILE=arm-none-linux-gnueabihf- $ make seeed_npi_imx6ull_defconfig $ make This will generate SPL and u-boot-dtb.img images. Boot from MMC/SD: - The SPL and u-boot-dtb.img images need to be flashed into the micro SD card: $ sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync $ sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 bs=1k seek=69; sync - Boot mode settings: Boot switch position: SW1 -> 0 SW2 -> 1 SW3 -> 0 SW4 -> 0 SW5 -> 1 SW6 -> 0 SW7 -> 0 SW8 -> 1 Boot from NAND: - Boot the board using SD/MMC or Serial download and load the SPL into memory either from SD/MMC or TFTP. Default MTD layout is 512k(spl),1m(uboot),1m(uboot-dup),-(ubi) Flash SPL to NAND from SD/MMC, $ ext4load mmc 0:2 $loadaddr SPL $ nand erase.part spl $ nandbcb init $loadaddr 0x0 $filesize Flash u-boot image to NAND from SD/MMC, $ ext4load mmc 0:2 $loadaddr u-boot-dtb.img $ nand erase.part uboot $ nand write $loadaddr uboot $filesize - Boot mode settings: Boot switch position: SW1 -> 0 SW2 -> 1 SW3 -> 1 SW4 -> 0 SW5 -> 0 SW6 -> 1 SW7 -> 0 SW8 -> 0 - Connect the Serial cable to UART0 and the PC for the console. - Reset the board using reset button and U-Boot should boot from NAND.