Aaron Williams 0dc4ab9c43 mips: octeon: Initial minimal support for the Marvell Octeon SoC ... This patch adds very basic support for the Octeon III SoCs. Only CFI parallel NOR flash and UART is supported for now. Please note that the basic Octeon port does not include the DDR3/4 initialization yet. This will be added in some follow-up patches later. To still use U-Boot on with this port, the L2 cache (4MiB on Octeon III CN73xx) is used as RAM. This way, U-Boot can boot to the prompt on such boards. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>		2020-07-18 15:47:50 +02:00
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arc	common: Drop linux/bitops.h from common header	2020-05-18 21:19:23 -04:00
arm	treewide: convert bd_t to struct bd_info manually	2020-07-17 10:46:44 -04:00
m68k	treewide: convert bd_t to struct bd_info manually	2020-07-17 10:46:44 -04:00
microblaze	Remove CROSS_COMPILE default from arch/*/config.mk	2020-07-01 10:11:03 -04:00
mips	mips: octeon: Initial minimal support for the Marvell Octeon SoC	2020-07-18 15:47:50 +02:00
nds32	treewide: convert bd_t to struct bd_info by coccinelle	2020-07-17 09:30:13 -04:00
nios2	Remove CROSS_COMPILE default from arch/*/config.mk	2020-07-01 10:11:03 -04:00
powerpc	treewide: convert bd_t to struct bd_info by coccinelle	2020-07-17 09:30:13 -04:00
riscv	Merge branch 'next'	2020-07-06 15:46:38 -04:00
sandbox	dm: acpi: Enhance acpi_get_name()	2020-07-17 14:32:24 +08:00
sh	treewide: convert bd_t to struct bd_info by coccinelle	2020-07-17 09:30:13 -04:00
x86	treewide: convert bd_t to struct bd_info by coccinelle	2020-07-17 09:30:13 -04:00
xtensa	Remove CROSS_COMPILE default from arch/*/config.mk	2020-07-01 10:11:03 -04:00
.gitignore
Kconfig	acpi: Enable ACPI table generation by default on x86	2020-07-17 14:32:24 +08:00
u-boot-elf.lds	arch: Add explicit linker script for u-boot-elf	2020-04-03 11:52:55 -04:00