u-boot/arch/arm/dts/stm32h743i-disco.dts
Patrice Chotard 7ccaa31380 MAINTAINERS: Update STi and STM32 maintainers emails in remaining files
A previous series already update STMicroelectronics emails maintainers
but some files have been omitted (Makefile, .dts, .dtsi and .rst files).
Update Patrick and my email address with the one dedicated to upstream
activities.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-01-13 09:52:58 +01:00

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// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* Copyright 2017 - Patrice Chotard <patrice.chotard@foss.st.com>
*
*/
/dts-v1/;
#include "stm32h743.dtsi"
#include "stm32h743-pinctrl.dtsi"
/ {
model = "STMicroelectronics STM32H743i-Discovery board";
compatible = "st,stm32h743i-disco", "st,stm32h743";
chosen {
bootargs = "root=/dev/ram";
stdout-path = "serial0:115200n8";
};
memory@d0000000 {
device_type = "memory";
reg = <0xd0000000 0x2000000>;
};
aliases {
serial0 = &usart2;
};
v3v3: regulator-v3v3 {
compatible = "regulator-fixed";
regulator-name = "v3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
&clk_hse {
clock-frequency = <25000000>;
};
&mac {
status = "disabled";
pinctrl-0 = <&ethernet_rmii>;
pinctrl-names = "default";
phy-mode = "rmii";
phy-handle = <&phy0>;
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
};
&sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
broken-cd;
st,neg-edge;
bus-width = <4>;
vmmc-supply = <&v3v3>;
status = "okay";
};
&usart2 {
pinctrl-0 = <&usart2_pins>;
pinctrl-names = "default";
status = "okay";
};