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https://github.com/AsahiLinux/u-boot
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899867a28a
This converts the following to Kconfig: CONFIG_OMAP_EHCI_PHY1_RESET_GPIO CONFIG_OMAP_EHCI_PHY2_RESET_GPIO CONFIG_OMAP_EHCI_PHY3_RESET_GPIO To do this, we also introduce CONFIG_HAS_CONFIG_OMAP_EHCI_PHYn_RESET_GPIO options to get setting the GPIO number. Signed-off-by: Tom Rini <trini@konsulko.com>
359 lines
11 KiB
Text
359 lines
11 KiB
Text
#
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# USB Host Controller Drivers
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#
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comment "USB Host Controller Drivers"
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config USB_HOST
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bool
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select DM_USB
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config USB_XHCI_HCD
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bool "xHCI HCD (USB 3.0) support"
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depends on DM && OF_CONTROL
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select USB_HOST
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---help---
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The eXtensible Host Controller Interface (xHCI) is standard for USB 3.0
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"SuperSpeed" host controller hardware.
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if USB_XHCI_HCD
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config USB_XHCI_DWC3
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bool "DesignWare USB3 DRD Core Support"
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help
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Say Y or if your system has a Dual Role SuperSpeed
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USB controller based on the DesignWare USB3 IP Core.
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config USB_XHCI_DWC3_OF_SIMPLE
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bool "DesignWare USB3 DRD Generic OF Simple Glue Layer"
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depends on DM_USB
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default y if ARCH_ROCKCHIP
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default y if DRA7XX
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help
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Support USB2/3 functionality in simple SoC integrations with
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USB controller based on the DesignWare USB3 IP Core.
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config USB_XHCI_MTK
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bool "Support for MediaTek on-chip xHCI USB controller"
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depends on ARCH_MEDIATEK
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help
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Enables support for the on-chip xHCI controller on MediaTek SoCs.
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config USB_XHCI_MVEBU
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bool "MVEBU USB 3.0 support"
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default y
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depends on ARCH_MVEBU
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select DM_REGULATOR
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help
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Choose this option to add support for USB 3.0 driver on mvebu
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SoCs, which includes Armada8K, Armada3700 and other Armada
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family SoCs.
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config USB_XHCI_OCTEON
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bool "Support for Marvell Octeon family on-chip xHCI USB controller"
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depends on ARCH_OCTEON
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default y
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help
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Enables support for the on-chip xHCI controller on Marvell Octeon
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family SoCs. This is a driver for the dwc3 to provide the glue logic
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to configure the controller.
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config USB_XHCI_OMAP
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bool "Support for TI OMAP family xHCI USB controller"
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depends on ARCH_OMAP2PLUS
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help
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Enables support for the on-chip xHCI controller found on some TI SoC
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families. Note that some families have multiple contollers while
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others only have something such as DesignWare-based controllers.
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Consult the SoC documentation to determine if this option applies
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to your hardware.
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config USB_XHCI_PCI
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bool "Support for PCI-based xHCI USB controller"
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depends on DM_USB
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default y if X86
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help
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Enables support for the PCI-based xHCI controller.
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config USB_XHCI_RCAR
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bool "Renesas RCar USB 3.0 support"
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default y
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depends on ARCH_RMOBILE
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help
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Choose this option to add support for USB 3.0 driver on Renesas
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RCar Gen3 SoCs.
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config USB_XHCI_STI
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bool "Support for STMicroelectronics STiH407 family on-chip xHCI USB controller"
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depends on ARCH_STI
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default y
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help
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Enables support for the on-chip xHCI controller on STMicroelectronics
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STiH407 family SoCs. This is a driver for the dwc3 to provide the glue logic
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to configure the controller.
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config USB_XHCI_DRA7XX_INDEX
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int "DRA7XX xHCI USB index"
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range 0 1
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default 0
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depends on DRA7XX
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help
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Select the DRA7XX xHCI USB index.
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Current supported values: 0, 1.
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config USB_XHCI_FSL
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bool "Support for NXP Layerscape on-chip xHCI USB controller"
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default y if ARCH_LS1021A || FSL_LSCH3 || FSL_LSCH2
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depends on !SPL_NO_USB
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help
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Enables support for the on-chip xHCI controller on NXP Layerscape SoCs.
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config USB_XHCI_BRCM
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bool "Broadcom USB3 Host XHCI controller"
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depends on DM_USB
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help
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USB controller based on the Broadcom USB3 IP Core.
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Supports USB2/3 functionality.
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endif # USB_XHCI_HCD
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config USB_EHCI_HCD
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bool "EHCI HCD (USB 2.0) support"
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default y if ARCH_MX5 || ARCH_MX6
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depends on DM && OF_CONTROL
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select USB_HOST
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---help---
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The Enhanced Host Controller Interface (EHCI) is standard for USB 2.0
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"high speed" (480 Mbit/sec, 60 Mbyte/sec) host controller hardware.
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If your USB host controller supports USB 2.0, you will likely want to
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configure this Host Controller Driver.
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EHCI controllers are packaged with "companion" host controllers (OHCI
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or UHCI) to handle USB 1.1 devices connected to root hub ports. Ports
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will connect to EHCI if the device is high speed, otherwise they
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connect to a companion controller. If you configure EHCI, you should
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probably configure the OHCI (for NEC and some other vendors) USB Host
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Controller Driver or UHCI (for Via motherboards) Host Controller
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Driver too.
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You may want to read <file:Documentation/usb/ehci.txt>.
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if USB_EHCI_HCD
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config USB_EHCI_ATMEL
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bool "Support for Atmel on-chip EHCI USB controller"
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depends on ARCH_AT91
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default y
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---help---
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Enables support for the on-chip EHCI controller on Atmel chips.
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config USB_EHCI_MARVELL
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bool "Support for Marvell on-chip EHCI USB controller"
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depends on ARCH_MVEBU || ARCH_KIRKWOOD || ARCH_ORION5X
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default y
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---help---
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Enables support for the on-chip EHCI controller on MVEBU SoCs.
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config USB_EHCI_MX5
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bool "Support for i.MX5 on-chip EHCI USB controller"
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depends on ARCH_MX5
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help
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Enables support for the on-chip EHCI controller on i.MX5 SoCs.
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config USB_EHCI_MX6
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bool "Support for i.MX6/i.MX7ULP on-chip EHCI USB controller"
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depends on ARCH_MX6 || ARCH_MX7ULP || ARCH_IMXRT
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default y
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---help---
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Enables support for the on-chip EHCI controller on i.MX6 SoCs.
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config USB_EHCI_MX7
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bool "Support for i.MX7 on-chip EHCI USB controller"
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depends on ARCH_MX7 || IMX8M
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select PHY if IMX8M
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select NOP_PHY if IMX8M
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default y
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---help---
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Enables support for the on-chip EHCI controller on i.MX7 SoCs.
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config USB_EHCI_OMAP
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bool "Support for OMAP3+ on-chip EHCI USB controller"
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depends on ARCH_OMAP2PLUS
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default y
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---help---
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Enables support for the on-chip EHCI controller on OMAP3 and later
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SoCs.
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if USB_EHCI_OMAP
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config HAS_OMAP_EHCI_PHY1_RESET_GPIO
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bool "PHY #1 requires a GPIO hold to it in RESET while PHY settles"
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help
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Enable this to be able to configure the GPIO number used to hold the
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PHY in RESET for enough time until the PHY is settled and ready.
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config OMAP_EHCI_PHY1_RESET_GPIO
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int "GPIO number to hold PHY #1 in RESET"
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depends on HAS_OMAP_EHCI_PHY1_RESET_GPIO
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config HAS_OMAP_EHCI_PHY2_RESET_GPIO
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bool "PHY #2 requires a GPIO hold to it in RESET while PHY settles"
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help
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Enable this to be able to configure the GPIO number used to hold the
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PHY in RESET for enough time until the PHY is settled and ready.
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config OMAP_EHCI_PHY2_RESET_GPIO
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int "GPIO number to hold PHY #2 in RESET"
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depends on HAS_OMAP_EHCI_PHY2_RESET_GPIO
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config HAS_OMAP_EHCI_PHY3_RESET_GPIO
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bool "PHY #3 requires a GPIO hold to it in RESET while PHY settles"
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help
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Enable this to be able to configure the GPIO number used to hold the
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PHY in RESET for enough time until the PHY is settled and ready.
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config OMAP_EHCI_PHY3_RESET_GPIO
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int "GPIO number to hold PHY #3 in RESET"
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depends on HAS_OMAP_EHCI_PHY3_RESET_GPIO
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endif
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config USB_EHCI_VF
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bool "Support for Vybrid on-chip EHCI USB controller"
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depends on ARCH_VF610
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default y
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help
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Enables support for the on-chip EHCI controller on Vybrid SoCs.
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if USB_EHCI_MX6 || USB_EHCI_MX7
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config MXC_USB_OTG_HACTIVE
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bool "USB Power pin high active"
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---help---
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Set the USB Power pin polarity to be high active (PWR_POL)
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endif
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config USB_EHCI_MSM
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bool "Support for Qualcomm on-chip EHCI USB controller"
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depends on DM_USB
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select USB_ULPI_VIEWPORT
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select MSM8916_USB_PHY
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---help---
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Enables support for the on-chip EHCI controller on Qualcomm
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Snapdragon SoCs.
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config USB_EHCI_PCI
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bool "Support for PCI-based EHCI USB controller"
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default y if X86
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help
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Enables support for the PCI-based EHCI controller.
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config USB_EHCI_TEGRA
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bool "Support for NVIDIA Tegra on-chip EHCI USB controller"
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depends on ARCH_TEGRA
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---help---
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Enable support for Tegra on-chip EHCI USB controller
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config USB_EHCI_ZYNQ
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bool "Support for Xilinx Zynq on-chip EHCI USB controller"
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default y if ARCH_ZYNQ
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---help---
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Enable support for Zynq on-chip EHCI USB controller
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config USB_EHCI_GENERIC
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bool "Support for generic EHCI USB controller"
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depends on DM_USB
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default ARCH_SUNXI
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---help---
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Enables support for generic EHCI controller.
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config USB_EHCI_FSL
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bool "Support for FSL on-chip EHCI USB controller"
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select CONFIG_EHCI_HCD_INIT_AFTER_RESET
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---help---
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Enables support for the on-chip EHCI controller on FSL chips.
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endif # USB_EHCI_HCD
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config USB_OHCI_HCD
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bool "OHCI HCD (USB 1.1) support"
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depends on DM && OF_CONTROL
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select USB_HOST
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---help---
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The Open Host Controller Interface (OHCI) is a standard for accessing
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USB 1.1 host controller hardware. It does more in hardware than Intel's
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UHCI specification. If your USB host controller follows the OHCI spec,
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say Y. On most non-x86 systems, and on x86 hardware that's not using a
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USB controller from Intel or VIA, this is appropriate. If your host
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controller doesn't use PCI, this is probably appropriate. For a PCI
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based system where you're not sure, the "lspci -v" entry will list the
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right "prog-if" for your USB controller(s): EHCI, OHCI, or UHCI.
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if USB_OHCI_HCD
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config USB_OHCI_PCI
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bool "Support for PCI-based OHCI USB controller"
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depends on PCI
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help
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Enables support for the PCI-based OHCI controller.
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config USB_OHCI_GENERIC
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bool "Support for generic OHCI USB controller"
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default ARCH_SUNXI
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---help---
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Enables support for generic OHCI controller.
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config USB_OHCI_DA8XX
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bool "Support for da850 OHCI USB controller"
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help
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Enable support for the da850 USB controller.
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endif # USB_OHCI_HCD
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config USB_UHCI_HCD
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bool "UHCI HCD (most Intel and VIA) support"
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select USB_HOST
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---help---
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The Universal Host Controller Interface is a standard by Intel for
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accessing the USB hardware in the PC (which is also called the USB
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host controller). If your USB host controller conforms to this
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standard, you may want to say Y, but see below. All recent boards
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with Intel PCI chipsets (like intel 430TX, 440FX, 440LX, 440BX,
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i810, i820) conform to this standard. Also all VIA PCI chipsets
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(like VIA VP2, VP3, MVP3, Apollo Pro, Apollo Pro II or Apollo Pro
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133) and LEON/GRLIB SoCs with the GRUSBHC controller.
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If unsure, say Y.
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if USB_UHCI_HCD
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endif # USB_UHCI_HCD
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config USB_DWC2
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bool "DesignWare USB2 Core support"
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depends on DM && OF_CONTROL
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select USB_HOST
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---help---
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The DesignWare USB 2.0 controller is compliant with the
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USB-Implementers Forum (USB-IF) USB 2.0 specifications.
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Hi-Speed (480 Mbps), Full-Speed (12 Mbps), and Low-Speed (1.5 Mbps)
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operation is compliant to the controller Supplement. If you want to
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enable this controller in host mode, say Y.
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if USB_DWC2
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config USB_DWC2_BUFFER_SIZE
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int "Data buffer size in kB"
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default 64
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---help---
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By default 64 kB buffer is used but if amount of RAM avaialble on
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the target is not enough to accommodate allocation of buffer of
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that size it is possible to shrink it. Smaller sizes should be fine
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because larger transactions could be split in smaller ones.
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endif # USB_DWC2
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config USB_R8A66597_HCD
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bool "Renesas R8A66597 USB Core support"
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depends on DM && OF_CONTROL
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select USB_HOST
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---help---
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This enables support for the on-chip Renesas R8A66597 USB 2.0
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controller, present in various RZ and SH SoCs.
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