mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-09-24 08:22:14 +00:00
61fed3155f
All *boot env commands overrides default boot source location via i2c. After board reset without power off, BootROM then starts booting U-Boot from this specified location instead of the default one. Add new env command defboot which reverts boot location to the default value, which in most cases is configurable by HW DIP switches. And add new env commands norlowerboot, norupperboot, sd2boot to boot from other locations. norlowerboot would instruct BootROM to boot from lower NOR bank, norupperboot from upper NOR bank and sd2boot from SD card with alternative configuration. Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com>
79 lines
2.5 KiB
C
79 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2010-2011 Freescale Semiconductor, Inc.
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* Copyright 2020 NXP
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* Copyright 2022 Pali Rohár <pali@kernel.org>
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*/
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#include <linux/stringify.h>
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#if !defined(CONFIG_SYS_SPD_BUS_NUM) || !defined(CONFIG_SYS_I2C_PCA9557_ADDR)
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#error "CONFIG_SYS_SPD_BUS_NUM and CONFIG_SYS_I2C_PCA9557_ADDR are required"
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#endif
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#define __BOOTSRC_CMD(src, msk) i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 1 src 1; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 msk 1
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#define __VAR_CMD(var, cmd) __stringify(var=cmd\0)
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#define __VAR_CMD_RST(var, cmd) __VAR_CMD(var, cmd; reset)
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#ifdef __SW_NOR_BANK_LO
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#define MAP_NOR_LO_CMD(var, ...) __VAR_CMD(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_NOR_BANK_LO, __SW_NOR_BANK_MASK))
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#else
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#define MAP_NOR_LO_CMD(var, ...) ""
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#endif
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#ifdef __SW_NOR_BANK_UP
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#define MAP_NOR_UP_CMD(var, ...) __VAR_CMD(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_NOR_BANK_UP, __SW_NOR_BANK_MASK))
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#else
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#define MAP_NOR_UP_CMD(var, ...) ""
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#endif
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#ifdef __SW_BOOT_NOR
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#define RST_NOR_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_NOR, __SW_BOOT_MASK))
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#else
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#define RST_NOR_CMD(var, ...) ""
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#endif
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#ifdef __SW_BOOT_NOR_BANK_LO
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#define RST_NOR_LO_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_NOR_BANK_LO, __SW_BOOT_MASK))
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#else
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#define RST_NOR_LO_CMD(var, ...) ""
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#endif
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#ifdef __SW_BOOT_NOR_BANK_UP
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#define RST_NOR_UP_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_NOR_BANK_UP, __SW_BOOT_MASK))
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#else
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#define RST_NOR_UP_CMD(var, ...) ""
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#endif
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#ifdef __SW_BOOT_SPI
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#define RST_SPI_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_SPI, __SW_BOOT_MASK))
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#else
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#define RST_SPI_CMD(var, ...) ""
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#endif
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#ifdef __SW_BOOT_SD
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#define RST_SD_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_SD, __SW_BOOT_MASK))
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#else
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#define RST_SD_CMD(var, ...) ""
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#endif
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#ifdef __SW_BOOT_SD2
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#define RST_SD2_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_SD2, __SW_BOOT_MASK))
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#else
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#define RST_SD2_CMD(var, ...) ""
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#endif
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#ifdef __SW_BOOT_NAND
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#define RST_NAND_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_NAND, __SW_BOOT_MASK))
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#else
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#define RST_NAND_CMD(var, ...) ""
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#endif
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#ifdef __SW_BOOT_PCIE
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#define RST_PCIE_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_PCIE, __SW_BOOT_MASK))
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#else
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#define RST_PCIE_CMD(var, ...) ""
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#endif
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#define RST_DEF_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(0x00, 0xff))
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