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0cc47a8ead
Sync sun7i-a20 dts(i) files from Linux 5.1-rc2 Linux commit details about the sun7i-a20* sync: "ARM: dts: sun7i: bananapi: Add GPIO banks regulators" (sha1: 09c6572290f018d73ec2e812e28bada34d41815f) Here are U-Boot specific dts changes. - s/uart0_pins_a/uart0_pb_pins for sun7i-a20-ainol-aw1.dts sun7i-a20-m5.dts sun7i-a20-primo73.dts sun7i-a20-yones-toptech-bd1078.dts sunxi-itead-core-common.dtsi - s/gmac_pins_mii_a/gmac_rgmii_pins for sun7i-a20-m5.dts - drop i2c0, i2c1 pins from sunxi-itead-core-common.dtsi - drop mmc0 pins from sun7i-a20-primo73.dts Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
56 lines
742 B
Text
56 lines
742 B
Text
// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* Copyright 2015 Hans de Goede <hdegoede@redhat.com>
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*
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* Minimal dts file for the Mele M5 for u-boot only
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*/
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/dts-v1/;
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#include "sun7i-a20.dtsi"
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/ {
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model = "Mele M5";
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compatible = "mele,m5", "allwinner,sun7i-a20";
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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};
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&ehci0 {
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status = "okay";
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};
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&ehci1 {
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status = "okay";
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};
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&gmac {
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pinctrl-names = "default";
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pinctrl-0 = <&gmac_rgmii_pins>;
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phy = <&phy1>;
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phy-mode = "mii";
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status = "okay";
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phy1: ethernet-phy@1 {
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reg = <1>;
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};
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};
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&ohci0 {
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status = "okay";
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};
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&ohci1 {
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status = "okay";
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pb_pins>;
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status = "okay";
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};
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