mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-25 14:10:43 +00:00
2f8a6db5d8
In order to finish moving this symbol to Kconfig for all platforms, we need to do a few more things. First, for all platforms that define this to a function, introduce CONFIG_DYNAMIC_SYS_CLK_FREQ, similar to CONFIG_DYNAMIC_DDR_CLK_FREQ and populate clock_legacy.h. This entails also switching all users from CONFIG_SYS_CLK_FREQ to get_board_sys_clk() and updating a few preprocessor tests. With that done, all platforms that define a value here can be converted to Kconfig, and a fall-back of zero is sufficiently safe to use (and what is used today in cases where code may or may not have this available). Make sure that code which calls this function includes <clock_legacy.h> to get the prototype. Signed-off-by: Tom Rini <trini@konsulko.com>
72 lines
1.9 KiB
Text
72 lines
1.9 KiB
Text
CONFIG_PPC=y
|
|
CONFIG_SYS_TEXT_BASE=0xFFF80000
|
|
CONFIG_SYS_MALLOC_LEN=0x100000
|
|
CONFIG_ENV_SIZE=0x2000
|
|
CONFIG_ENV_SECT_SIZE=0x20000
|
|
CONFIG_DEFAULT_DEVICE_TREE="mpc8548cds_36b"
|
|
CONFIG_MPC85xx=y
|
|
# CONFIG_CMD_ERRATA is not set
|
|
CONFIG_TARGET_MPC8548CDS=y
|
|
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
|
|
CONFIG_PHYS_64BIT=y
|
|
CONFIG_OF_BOARD_SETUP=y
|
|
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
|
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
|
|
CONFIG_BOOTDELAY=10
|
|
CONFIG_USE_BOOTCOMMAND=y
|
|
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr"
|
|
# CONFIG_MISC_INIT_R is not set
|
|
CONFIG_ID_EEPROM=y
|
|
CONFIG_HUSH_PARSER=y
|
|
CONFIG_CMD_IMLS=y
|
|
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
|
|
CONFIG_CMD_I2C=y
|
|
CONFIG_CMD_PCI=y
|
|
CONFIG_CMD_DHCP=y
|
|
CONFIG_CMD_MII=y
|
|
CONFIG_CMD_PING=y
|
|
# CONFIG_CMD_HASH is not set
|
|
CONFIG_OF_CONTROL=y
|
|
CONFIG_ENV_OVERWRITE=y
|
|
CONFIG_ENV_ADDR=0xFFF60000
|
|
CONFIG_DM=y
|
|
CONFIG_DDR_ECC=y
|
|
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
|
|
CONFIG_SYS_BR0_PRELIM_BOOL=y
|
|
CONFIG_SYS_BR0_PRELIM=0xFF807001
|
|
CONFIG_SYS_OR0_PRELIM=0xFF806E65
|
|
CONFIG_SYS_BR1_PRELIM_BOOL=y
|
|
CONFIG_SYS_BR1_PRELIM=0xFF007001
|
|
CONFIG_SYS_OR1_PRELIM=0xFF806E65
|
|
CONFIG_SYS_BR2_PRELIM_BOOL=y
|
|
CONFIG_SYS_BR2_PRELIM=0xF0007861
|
|
CONFIG_SYS_OR2_PRELIM=0xFC006901
|
|
CONFIG_SYS_BR3_PRELIM_BOOL=y
|
|
CONFIG_SYS_BR3_PRELIM=0xF8006801
|
|
CONFIG_SYS_OR3_PRELIM=0xFFF00FF7
|
|
CONFIG_DM_I2C=y
|
|
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
|
|
CONFIG_SYS_I2C_FSL=y
|
|
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
|
|
# CONFIG_MMC is not set
|
|
CONFIG_MTD_NOR_FLASH=y
|
|
CONFIG_FLASH_CFI_DRIVER=y
|
|
CONFIG_SYS_FLASH_CFI=y
|
|
CONFIG_PHY_ATHEROS=y
|
|
CONFIG_PHY_BROADCOM=y
|
|
CONFIG_PHY_DAVICOM=y
|
|
CONFIG_PHY_LXT=y
|
|
CONFIG_PHY_MARVELL=y
|
|
CONFIG_PHY_NATSEMI=y
|
|
CONFIG_PHY_REALTEK=y
|
|
CONFIG_PHY_SMSC=y
|
|
CONFIG_PHY_VITESSE=y
|
|
CONFIG_PHY_GIGE=y
|
|
CONFIG_E1000=y
|
|
CONFIG_MII=y
|
|
CONFIG_TSEC_ENET=y
|
|
CONFIG_DM_PCI_COMPAT=y
|
|
CONFIG_PCIE_FSL=y
|
|
CONFIG_CONS_INDEX=2
|
|
CONFIG_SYS_NS16550=y
|
|
CONFIG_ADDR_MAP=y
|