mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-04 02:20:25 +00:00
e24ea55c04
On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote: > > + case 1: > > +#if CONFIG_MMC1_PG > Are you sure that this is correct and shouldn't be: > > +#ifdef CONFIG_MMC1_PG > > ? It's "correct" in so far as it works (the boards.cfg config stuff #defines things to 1), but I think you are right that it isn't the preferred style. But... > A quick scan through this patch series shows that this define > is not set at all. Perhaps its outdated? Or is it used to support > some other sunxi SoC? Not sure, perhaps it should be removed for > now. ...I had thought that it was to support some other board which wasn't being upstreamed right now, so eventually useful and harmless for now, but I've just checked and it isn't actually used by any of the boards in u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it. Rather than resend the entire series, here is v5.1 of this patch. > Other than this please add my: > > Reviewed-by: Stefan Roese <sr@denx.de> Thanks! 8<--------------------------------- >From 20704e35a41664de5f516ed0e02981ac06085102 Mon Sep 17 00:00:00 2001 From: Ian Campbell <ijc@hellion.org.uk> Date: Fri, 7 Mar 2014 04:29:39 +0000 Subject: [PATCH v5.1 7/8] sunxi: mmc support This adds support for the MMC controller on the Allwinner A20 (sun7i) processor. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Luke Leighton <lkcl@lkcl.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Cc: Aaron Maoye <leafy.myeh@allwinnertech.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Reviewed-by: Tom Rini <trini@ti.com>
120 lines
2.7 KiB
C
120 lines
2.7 KiB
C
/*
|
|
* (C) Copyright 2012-2013 Henrik Nordstrom <henrik@henriknordstrom.net>
|
|
* (C) Copyright 2013 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
|
|
*
|
|
* (C) Copyright 2007-2011
|
|
* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
|
|
* Tom Cubie <tangliang@allwinnertech.com>
|
|
*
|
|
* Some board init for the Allwinner A10-evb board.
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <asm/arch/clock.h>
|
|
#include <asm/arch/dram.h>
|
|
#include <asm/arch/gpio.h>
|
|
#include <asm/arch/mmc.h>
|
|
|
|
DECLARE_GLOBAL_DATA_PTR;
|
|
|
|
/* add board specific code here */
|
|
int board_init(void)
|
|
{
|
|
int id_pfr1;
|
|
|
|
gd->bd->bi_boot_params = (PHYS_SDRAM_0 + 0x100);
|
|
|
|
asm volatile("mrc p15, 0, %0, c0, c1, 1" : "=r"(id_pfr1));
|
|
debug("id_pfr1: 0x%08x\n", id_pfr1);
|
|
/* Generic Timer Extension available? */
|
|
if ((id_pfr1 >> 16) & 0xf) {
|
|
debug("Setting CNTFRQ\n");
|
|
/* CNTFRQ == 24 MHz */
|
|
asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r"(24000000));
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int dram_init(void)
|
|
{
|
|
gd->ram_size = get_ram_size((long *)PHYS_SDRAM_0, PHYS_SDRAM_0_SIZE);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_GENERIC_MMC
|
|
static void mmc_pinmux_setup(int sdc)
|
|
{
|
|
unsigned int pin;
|
|
|
|
switch (sdc) {
|
|
case 0:
|
|
/* D1-PF0, D0-PF1, CLK-PF2, CMD-PF3, D3-PF4, D4-PF5 */
|
|
for (pin = SUNXI_GPF(0); pin <= SUNXI_GPF(5); pin++) {
|
|
sunxi_gpio_set_cfgpin(pin, SUNXI_GPF0_SDC0);
|
|
sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
|
|
sunxi_gpio_set_drv(pin, 2);
|
|
}
|
|
break;
|
|
|
|
case 1:
|
|
/* CMD-PH22, CLK-PH23, D0~D3-PH24~27 : 5 */
|
|
for (pin = SUNXI_GPH(22); pin <= SUNXI_GPH(27); pin++) {
|
|
sunxi_gpio_set_cfgpin(pin, SUN4I_GPH22_SDC1);
|
|
sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
|
|
sunxi_gpio_set_drv(pin, 2);
|
|
}
|
|
break;
|
|
|
|
case 2:
|
|
/* CMD-PC6, CLK-PC7, D0-PC8, D1-PC9, D2-PC10, D3-PC11 */
|
|
for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(11); pin++) {
|
|
sunxi_gpio_set_cfgpin(pin, SUNXI_GPC6_SDC2);
|
|
sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
|
|
sunxi_gpio_set_drv(pin, 2);
|
|
}
|
|
break;
|
|
|
|
case 3:
|
|
/* CMD-PI4, CLK-PI5, D0~D3-PI6~9 : 2 */
|
|
for (pin = SUNXI_GPI(4); pin <= SUNXI_GPI(9); pin++) {
|
|
sunxi_gpio_set_cfgpin(pin, SUN4I_GPI4_SDC3);
|
|
sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
|
|
sunxi_gpio_set_drv(pin, 2);
|
|
}
|
|
break;
|
|
|
|
default:
|
|
printf("sunxi: invalid MMC slot %d for pinmux setup\n", sdc);
|
|
break;
|
|
}
|
|
}
|
|
|
|
int board_mmc_init(bd_t *bis)
|
|
{
|
|
mmc_pinmux_setup(CONFIG_MMC_SUNXI_SLOT);
|
|
sunxi_mmc_init(CONFIG_MMC_SUNXI_SLOT);
|
|
#if !defined (CONFIG_SPL_BUILD) && defined (CONFIG_MMC_SUNXI_SLOT_EXTRA)
|
|
mmc_pinmux_setup(CONFIG_MMC_SUNXI_SLOT_EXTRA);
|
|
sunxi_mmc_init(CONFIG_MMC_SUNXI_SLOT_EXTRA);
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
#ifdef CONFIG_SPL_BUILD
|
|
void sunxi_board_init(void)
|
|
{
|
|
unsigned long ramsize;
|
|
|
|
printf("DRAM:");
|
|
ramsize = sunxi_dram_init();
|
|
printf(" %lu MiB\n", ramsize >> 20);
|
|
if (!ramsize)
|
|
hang();
|
|
}
|
|
#endif
|