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u-boot/arch/arm/mach-uniphier/init
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Masahiro Yamada 0bd20207ab ARM: uniphier: disable cache in SPL of PH1-LD20 
The Boot ROM has enabled D-cache and MMU setting DDR memory area
as Normal Memory in its page table.  Disable D-cache and MMU
before jumping to U-Boot proper.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-26 00:35:26 +09:00
..
init-ld4.c ARM: uniphier: rename function names ph1_* to uniphier_* 2016-04-01 00:59:47 +09:00
init-ld20.c ARM: uniphier: disable cache in SPL of PH1-LD20 2016-05-26 00:35:26 +09:00
init-pro4.c ARM: uniphier: rename function names ph1_* to uniphier_* 2016-04-01 00:59:47 +09:00
init-pro5.c ARM: uniphier: rename function names ph1_* to uniphier_* 2016-04-01 00:59:47 +09:00
init-pxs2.c ARM: uniphier: rename function names ph1_* to uniphier_* 2016-04-01 00:59:47 +09:00
init-sld3.c ARM: uniphier: move pin-mux code into pin_init function 2016-05-01 01:13:45 +09:00
init-sld8.c ARM: uniphier: rename function names ph1_* to uniphier_* 2016-04-01 00:59:47 +09:00
init.c ARM: uniphier: add PH1-LD20 SoC support 2016-04-24 09:54:08 +09:00
Makefile ARM: uniphier: add PH1-LD20 SoC support 2016-04-24 09:54:08 +09:00