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https://github.com/AsahiLinux/u-boot
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3fce6bf213
CFG_STM32MP1_SCMI_SHM_SYSRAM will be disabled by default for STM32MP13x SoCs in next OP-TEE version and the OP-TEE SMCI server uses the OP-TEE native shared memory registered by clients. To be compatible by default with this configuration this patch removes the shared memory in the SCMI configuration and the associated reserved memory in SRAM. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
113 lines
1.1 KiB
Text
113 lines
1.1 KiB
Text
// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
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/*
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* Copyright (C) 2022, STMicroelectronics - All Rights Reserved
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*/
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/ {
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aliases {
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gpio0 = &gpioa;
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gpio1 = &gpiob;
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gpio2 = &gpioc;
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gpio3 = &gpiod;
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gpio4 = &gpioe;
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gpio5 = &gpiof;
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gpio6 = &gpiog;
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gpio7 = &gpioh;
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gpio8 = &gpioi;
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pinctrl0 = &pinctrl;
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};
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firmware {
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optee {
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bootph-all;
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};
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};
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/* need PSCI for sysreset during board_f */
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psci {
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bootph-some-ram;
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};
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soc {
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bootph-all;
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ddr: ddr@5a003000 {
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bootph-all;
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compatible = "st,stm32mp13-ddr";
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reg = <0x5A003000 0x550
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0x5A004000 0x234>;
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status = "okay";
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};
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};
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};
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&bsec {
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bootph-all;
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};
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&gpioa {
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bootph-all;
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};
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&gpiob {
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bootph-all;
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};
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&gpioc {
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bootph-all;
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};
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&gpiod {
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bootph-all;
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};
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&gpioe {
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bootph-all;
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};
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&gpiof {
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bootph-all;
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};
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&gpiog {
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bootph-all;
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};
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&gpioh {
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bootph-all;
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};
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&gpioi {
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bootph-all;
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};
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&iwdg2 {
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bootph-all;
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};
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&pinctrl {
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bootph-all;
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};
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&rcc {
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bootph-all;
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};
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&scmi {
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bootph-all;
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};
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&scmi_clk {
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bootph-all;
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};
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&scmi_reset {
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bootph-all;
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};
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&syscfg {
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bootph-all;
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};
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