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a5dfa3b8a0
As PLICSW is used to trigger the software interrupt, we should rename Andes PLIC configuration and file name to reflect the usage. This patch also updates PLMT and PLICSW compatible strings to be consistent with OpenSBI fdt driver. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Rick Chen <rick@andestech.com>
70 lines
1.6 KiB
C
70 lines
1.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2019, Rick Chen <rick@andestech.com>
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* Copyright (C) 2020, Sean Anderson <seanga2@gmail.com>
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*
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* U-Boot syscon driver for Andes's Platform Level Machine Timer (PLMT).
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* The PLMT block holds memory-mapped mtime register
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* associated with timer tick.
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*/
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#include <common.h>
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#include <dm.h>
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#include <timer.h>
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#include <asm/io.h>
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#include <dm/device-internal.h>
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#include <linux/err.h>
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/* mtime register */
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#define MTIME_REG(base) ((ulong)(base))
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static u64 notrace andes_plmt_get_count(struct udevice *dev)
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{
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return readq((void __iomem *)MTIME_REG(dev_get_priv(dev)));
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}
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#if CONFIG_IS_ENABLED(RISCV_MMODE) && IS_ENABLED(CONFIG_TIMER_EARLY)
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/**
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* timer_early_get_rate() - Get the timer rate before driver model
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*/
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unsigned long notrace timer_early_get_rate(void)
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{
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return RISCV_MMODE_TIMER_FREQ;
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}
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/**
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* timer_early_get_count() - Get the timer count before driver model
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*
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*/
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u64 notrace timer_early_get_count(void)
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{
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return readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE));
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}
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#endif
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static const struct timer_ops andes_plmt_ops = {
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.get_count = andes_plmt_get_count,
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};
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static int andes_plmt_probe(struct udevice *dev)
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{
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dev_set_priv(dev, dev_read_addr_ptr(dev));
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if (!dev_get_priv(dev))
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return -EINVAL;
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return timer_timebase_fallback(dev);
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}
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static const struct udevice_id andes_plmt_ids[] = {
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{ .compatible = "andestech,plmt0" },
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{ }
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};
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U_BOOT_DRIVER(andes_plmt) = {
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.name = "andes_plmt",
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.id = UCLASS_TIMER,
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.of_match = andes_plmt_ids,
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.ops = &andes_plmt_ops,
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.probe = andes_plmt_probe,
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.flags = DM_FLAG_PRE_RELOC,
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};
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