mirror of
https://github.com/AsahiLinux/u-boot
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350 lines
6.9 KiB
C
350 lines
6.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2019 Rockchip Electronics Co., Ltd.
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*/
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#include <common.h>
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#include <clk.h>
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#include <cpu_func.h>
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#include <dm.h>
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#include <efi_loader.h>
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#include <fastboot.h>
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#include <init.h>
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#include <log.h>
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#include <mmc.h>
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#include <part.h>
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#include <ram.h>
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#include <syscon.h>
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#include <uuid.h>
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#include <asm/cache.h>
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include <asm/arch-rockchip/boot_mode.h>
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#include <asm/arch-rockchip/clock.h>
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#include <asm/arch-rockchip/periph.h>
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#include <asm/arch-rockchip/misc.h>
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#include <power/regulator.h>
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DECLARE_GLOBAL_DATA_PTR;
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#if defined(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && defined(CONFIG_EFI_PARTITION)
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#define DFU_ALT_BUF_LEN SZ_1K
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static struct efi_fw_image *fw_images;
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static bool updatable_image(struct disk_partition *info)
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{
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int i;
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bool ret = false;
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efi_guid_t image_type_guid;
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uuid_str_to_bin(info->type_guid, image_type_guid.b,
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UUID_STR_FORMAT_GUID);
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for (i = 0; i < update_info.num_images; i++) {
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if (!guidcmp(&fw_images[i].image_type_id, &image_type_guid)) {
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ret = true;
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break;
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}
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}
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return ret;
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}
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static void set_image_index(struct disk_partition *info, int index)
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{
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int i;
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efi_guid_t image_type_guid;
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uuid_str_to_bin(info->type_guid, image_type_guid.b,
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UUID_STR_FORMAT_GUID);
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for (i = 0; i < update_info.num_images; i++) {
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if (!guidcmp(&fw_images[i].image_type_id, &image_type_guid)) {
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fw_images[i].image_index = index;
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break;
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}
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}
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}
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static int get_mmc_desc(struct blk_desc **desc)
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{
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int ret;
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struct mmc *mmc;
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struct udevice *dev;
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/*
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* For now the firmware images are assumed to
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* be on the SD card
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*/
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ret = uclass_get_device(UCLASS_MMC, 1, &dev);
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if (ret)
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return -1;
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mmc = mmc_get_mmc_dev(dev);
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if (!mmc)
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return -ENODEV;
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if ((ret = mmc_init(mmc)))
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return ret;
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*desc = mmc_get_blk_desc(mmc);
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if (!*desc)
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return -1;
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return 0;
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}
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void set_dfu_alt_info(char *interface, char *devstr)
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{
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const char *name;
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bool first = true;
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int p, len, devnum, ret;
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char buf[DFU_ALT_BUF_LEN];
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struct disk_partition info;
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struct blk_desc *desc = NULL;
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ret = get_mmc_desc(&desc);
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if (ret) {
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log_err("Unable to get mmc desc\n");
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return;
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}
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memset(buf, 0, sizeof(buf));
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name = blk_get_uclass_name(desc->uclass_id);
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devnum = desc->devnum;
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len = strlen(buf);
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len += snprintf(buf + len, DFU_ALT_BUF_LEN - len,
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"%s %d=", name, devnum);
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for (p = 1; p <= MAX_SEARCH_PARTITIONS; p++) {
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if (part_get_info(desc, p, &info))
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continue;
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/* Add entry to dfu_alt_info only for updatable images */
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if (updatable_image(&info)) {
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if (!first)
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len += snprintf(buf + len,
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DFU_ALT_BUF_LEN - len, ";");
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len += snprintf(buf + len, DFU_ALT_BUF_LEN - len,
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"%s%d_%s part %d %d",
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name, devnum, info.name, devnum, p);
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first = false;
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}
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}
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log_debug("dfu_alt_info => %s\n", buf);
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env_set("dfu_alt_info", buf);
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}
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static void gpt_capsule_update_setup(void)
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{
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int p, i, ret;
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struct disk_partition info;
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struct blk_desc *desc = NULL;
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fw_images = update_info.images;
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rockchip_capsule_update_board_setup();
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ret = get_mmc_desc(&desc);
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if (ret) {
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log_err("Unable to get mmc desc\n");
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return;
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}
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for (p = 1, i = 1; p <= MAX_SEARCH_PARTITIONS; p++) {
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if (part_get_info(desc, p, &info))
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continue;
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/*
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* Since we have a GPT partitioned device, the updatable
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* images could be stored in any order. Populate the
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* image_index at runtime.
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*/
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if (updatable_image(&info)) {
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set_image_index(&info, i);
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i++;
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}
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}
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}
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#endif /* CONFIG_EFI_HAVE_CAPSULE_SUPPORT && CONFIG_EFI_PARTITION */
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__weak int rk_board_late_init(void)
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{
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#if defined(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && defined(CONFIG_EFI_PARTITION)
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gpt_capsule_update_setup();
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#endif
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return 0;
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}
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int board_late_init(void)
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{
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setup_boot_mode();
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return rk_board_late_init();
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}
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int board_init(void)
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{
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int ret;
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#ifdef CONFIG_DM_REGULATOR
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ret = regulators_enable_boot_on(false);
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if (ret)
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debug("%s: Cannot enable boot on regulator\n", __func__);
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#endif
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return 0;
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}
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#if !defined(CONFIG_SYS_DCACHE_OFF) && !defined(CONFIG_ARM64)
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void enable_caches(void)
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{
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/* Enable D-cache. I-cache is already enabled in start.S */
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dcache_enable();
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}
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#endif
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#if defined(CONFIG_USB_GADGET)
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#include <usb.h>
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#if defined(CONFIG_USB_GADGET_DWC2_OTG)
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#include <linux/usb/otg.h>
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#include <usb/dwc2_udc.h>
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static struct dwc2_plat_otg_data otg_data = {
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.rx_fifo_sz = 512,
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.np_tx_fifo_sz = 16,
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.tx_fifo_sz = 128,
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};
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int board_usb_init(int index, enum usb_init_type init)
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{
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ofnode node;
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bool matched = false;
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/* find the usb_otg node */
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node = ofnode_by_compatible(ofnode_null(), "snps,dwc2");
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while (ofnode_valid(node)) {
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switch (usb_get_dr_mode(node)) {
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case USB_DR_MODE_OTG:
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case USB_DR_MODE_PERIPHERAL:
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matched = true;
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break;
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default:
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break;
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}
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if (matched)
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break;
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node = ofnode_by_compatible(node, "snps,dwc2");
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}
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if (!matched) {
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debug("Not found usb_otg device\n");
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return -ENODEV;
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}
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otg_data.regs_otg = ofnode_get_addr(node);
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#ifdef CONFIG_ROCKCHIP_USB2_PHY
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int ret;
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u32 phandle, offset;
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ofnode phy_node;
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ret = ofnode_read_u32(node, "phys", &phandle);
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if (ret)
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return ret;
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node = ofnode_get_by_phandle(phandle);
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if (!ofnode_valid(node)) {
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debug("Not found usb phy device\n");
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return -ENODEV;
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}
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phy_node = ofnode_get_parent(node);
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if (!ofnode_valid(node)) {
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debug("Not found usb phy device\n");
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return -ENODEV;
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}
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otg_data.phy_of_node = phy_node;
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ret = ofnode_read_u32(node, "reg", &offset);
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if (ret)
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return ret;
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otg_data.regs_phy = offset +
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(u32)syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
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#endif
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return dwc2_udc_probe(&otg_data);
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}
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int board_usb_cleanup(int index, enum usb_init_type init)
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{
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return 0;
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}
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#endif /* CONFIG_USB_GADGET_DWC2_OTG */
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#if defined(CONFIG_USB_DWC3_GADGET) && !defined(CONFIG_DM_USB_GADGET)
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#include <dwc3-uboot.h>
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static struct dwc3_device dwc3_device_data = {
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.maximum_speed = USB_SPEED_HIGH,
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.base = 0xfe800000,
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.dr_mode = USB_DR_MODE_PERIPHERAL,
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.index = 0,
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.dis_u2_susphy_quirk = 1,
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.hsphy_mode = USBPHY_INTERFACE_MODE_UTMIW,
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};
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int usb_gadget_handle_interrupts(int index)
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{
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dwc3_uboot_handle_interrupt(0);
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return 0;
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}
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int board_usb_init(int index, enum usb_init_type init)
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{
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return dwc3_uboot_init(&dwc3_device_data);
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}
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#endif /* CONFIG_USB_DWC3_GADGET */
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#endif /* CONFIG_USB_GADGET */
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#if IS_ENABLED(CONFIG_FASTBOOT)
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int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason)
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{
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if (reason != FASTBOOT_REBOOT_REASON_BOOTLOADER)
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return -ENOTSUPP;
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printf("Setting reboot to fastboot flag ...\n");
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/* Set boot mode to fastboot */
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writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG);
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return 0;
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}
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#endif
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#ifdef CONFIG_MISC_INIT_R
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__weak int misc_init_r(void)
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{
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const u32 cpuid_offset = CFG_CPUID_OFFSET;
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const u32 cpuid_length = 0x10;
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u8 cpuid[cpuid_length];
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int ret;
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ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
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if (ret)
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return ret;
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ret = rockchip_cpuid_set(cpuid, cpuid_length);
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if (ret)
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return ret;
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ret = rockchip_setup_macaddr();
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return ret;
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}
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#endif
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