mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-28 15:41:40 +00:00
ab92b38a01
We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16. Introduce select statements for other architectures based on current usage. For MIPS, we take the existing arch-specific symbol and migrate to the generic symbol. This lets us remove a little bit of otherwise unused code. Cc: Alexey Brodkin <alexey.brodkin@synopsys.com> Cc: Anup Patel <anup.patel@wdc.com> Cc: Atish Patra <atish.patra@wdc.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Leo <ycliang@andestech.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
30 lines
594 B
C
30 lines
594 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
/*
|
|
* Copyright (c) 2011 The Chromium OS Authors.
|
|
*/
|
|
|
|
#ifndef __X86_CACHE_H__
|
|
#define __X86_CACHE_H__
|
|
|
|
/*
|
|
* Use CONFIG_SYS_CACHELINE_SIZE (which is set to 64-bytes) for DMA alignment.
|
|
*/
|
|
#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
|
|
|
|
static inline void wbinvd(void)
|
|
{
|
|
asm volatile ("wbinvd" : : : "memory");
|
|
}
|
|
|
|
static inline void invd(void)
|
|
{
|
|
asm volatile("invd" : : : "memory");
|
|
}
|
|
|
|
/* Enable caches and write buffer */
|
|
void enable_caches(void);
|
|
|
|
/* Disable caches and write buffer */
|
|
void disable_caches(void);
|
|
|
|
#endif /* __X86_CACHE_H__ */
|