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db75356f14
The bcm2835 and bcm2836 are essentially identical, except: - The CPU is an ARM1176 v.s. a quad-core Cortex-A7. - The physical address of many IO controllers has moved. Rather than introducing a whole new bcm2836 value for $(SOC) or $(ARCH), update the existing bcm2835 code to handle the minor differences, and plumb it into the ARMv7 CPU architecture. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
33 lines
553 B
C
33 lines
553 B
C
/*
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* (C) Copyright 2012,2015 Stephen Warren
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#ifndef _BCM2835_TIMER_H
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#define _BCM2835_TIMER_H
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#ifdef CONFIG_BCM2836
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#define BCM2835_TIMER_PHYSADDR 0x3f003000
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#else
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#define BCM2835_TIMER_PHYSADDR 0x20003000
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#endif
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struct bcm2835_timer_regs {
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u32 cs;
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u32 clo;
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u32 chi;
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u32 c0;
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u32 c1;
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u32 c2;
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u32 c3;
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};
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#define BCM2835_TIMER_CS_M3 (1 << 3)
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#define BCM2835_TIMER_CS_M2 (1 << 2)
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#define BCM2835_TIMER_CS_M1 (1 << 1)
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#define BCM2835_TIMER_CS_M0 (1 << 0)
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extern ulong get_timer_us(ulong base);
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#endif
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