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Texas Instruments produces quite a lot of SoCs based upon a common architecture 'generation'. (eg: OMAP, K3) TI's existing documentation layout makes noticing this generation jump rather difficult. To make navigation easier, split the existing documentation into individual SoC families so we may begin grouping them according to their generational (eg: OMAP, K3) families. Signed-off-by: Bryan Brattlof <bb@ti.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
231 lines
10 KiB
ReStructuredText
231 lines
10 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
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.. sectionauthor:: Vignesh Raghavendra <vigneshr@ti.com>
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AM62 Platforms
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===============
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Introduction:
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-------------
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The AM62 SoC family is the follow on AM335x built on the K3 Multicore
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SoC architecture platform, providing ultra-low-power modes, dual
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display, multi-sensor edge compute, security and other BOM-saving
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integrations. The AM62 SoC targets a broad market to enable
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applications such as Industrial HMI, PLC/CNC/Robot control, Medical
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Equipment, Building Automation, Appliances and more.
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Some highlights of this SoC are:
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* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster.
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Pin-to-pin compatible options for single and quad core are available.
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* Cortex-M4F for general-purpose or safety usage.
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* Dual display support, providing 24-bit RBG parallel interface and
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OLDI/LVDS-4 Lane x2, up to 200MHz pixel clock support for 2K display
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resolution.
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* Selectable GPU support, up to 8GFLOPS, providing better user experience
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in 3D graphic display case and Android.
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* PRU(Programmable Realtime Unit) support for customized programmable
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interfaces/IOs.
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* Integrated Giga-bit Ethernet switch supporting up to a total of two
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external ports (TSN capable).
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* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, GPMC for
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NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio,
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1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals.
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* Dedicated Centralized System Controller for Security, Power, and
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Resource Management.
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* Multiple low power modes support, ex: Deep sleep, Standby, MCU-only,
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enabling battery powered system design.
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More details can be found in the Technical Reference Manual:
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https://www.ti.com/lit/pdf/spruiv7
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Boot Flow:
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----------
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Below is the pictorial representation of boot flow:
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.. code-block:: text
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+------------------------------------------------------------------------+
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| TIFS | Main R5 | A53 |
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+------------------------------------------------------------------------+
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| +--------+ | | |
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| | Reset | | | |
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| +--------+ | | |
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| : | | |
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| +--------+ | +-----------+ | |
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| | *ROM* |----------|-->| Reset rls | | |
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| +--------+ | +-----------+ | |
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| | | | : | |
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| | ROM | | : | |
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| |services| | : | |
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| | | | +-------------+ | |
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| | | | | *R5 ROM* | | |
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| | | | +-------------+ | |
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| | |<---------|---|Load and auth| | |
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| | | | | tiboot3.bin | | |
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| +--------+ | +-------------+ | |
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| | |<---------|---| Load sysfw | | |
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| | | | | part to TIFS| | |
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| | | | | core | | |
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| | | | +-------------+ | |
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| | | | : | |
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| | | | : | |
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| | | | : | |
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| | | | +-------------+ | |
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| | | | | *R5 SPL* | | |
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| | | | +-------------+ | |
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| | | | | DDR | | |
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| | | | | config | | |
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| | | | +-------------+ | |
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| | | | | Load | | |
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| | | | | tispl.bin | | |
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| | | | +-------------+ | |
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| | | | | Load R5 | | |
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| | | | | firmware | | |
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| | | | +-------------+ | |
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| | |<---------|---| Start A53 | | |
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| | | | | and jump to | | |
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| | | | | DM fw image | | |
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| | | | +-------------+ | |
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| | | | | +-----------+ |
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| | |----------|-----------------------|---->| Reset rls | |
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| | | | | +-----------+ |
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| | TIFS | | | : |
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| |Services| | | +-----------+ |
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| | |<---------|-----------------------|---->|*ATF/OPTEE*| |
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| | | | | +-----------+ |
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| | | | | : |
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| | | | | +-----------+ |
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| | |<---------|-----------------------|---->| *A53 SPL* | |
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| | | | | +-----------+ |
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| | | | | | Load | |
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| | | | | | u-boot.img| |
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| | | | | +-----------+ |
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| | | | | : |
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| | | | | +-----------+ |
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| | |<---------|-----------------------|---->| *U-Boot* | |
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| | | | | +-----------+ |
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| | | | | | prompt | |
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| | |----------|-----------------------|-----+-----------+-----|
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| +--------+ | | |
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+------------------------------------------------------------------------+
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- Here TIFS acts as master and provides all the critical services. R5/A53
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requests TIFS to get these services done as shown in the above diagram.
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Sources:
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--------
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1. SYSFW:
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Tree: git://git.ti.com/k3-image-gen/k3-image-gen.git
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Branch: master
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2. ATF:
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Tree: https://github.com/ARM-software/arm-trusted-firmware.git
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Branch: master
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3. OPTEE:
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Tree: https://github.com/OP-TEE/optee_os.git
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Branch: master
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4. U-Boot:
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Tree: https://source.denx.de/u-boot/u-boot
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Branch: master
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5. TI Linux Firmware:
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Tree: git://git.ti.com/processor-firmware/ti-linux-firmware.git
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Branch: ti-linux-firmware
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Build procedure:
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----------------
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1. ATF:
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.. code-block:: text
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$ make CROSS_COMPILE=aarch64-none-linux-gnu- ARCH=aarch64 PLAT=k3 TARGET_BOARD=lite SPD=opteed
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2. OPTEE:
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.. code-block:: text
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$ make PLATFORM=k3 CFG_ARM64_core=y CROSS_COMPILE=arm-none-linux-gnueabihf- CROSS_COMPILE64=aarch64-none-linux-gnu-
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3. U-Boot:
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* 3.1 R5:
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.. code-block:: text
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$ make ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabihf- am62x_evm_r5_defconfig O=/tmp/r5
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$ make ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabihf- O=/tmp/r5
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$ cd <k3-image-gen>
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$ make ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabihf- SOC=am62x SBL=/tmp/r5/spl/u-boot-spl.bin SYSFW_PATH=<path to ti-linux-firmware>/ti-sysfw/ti-fs-firmware-am62x-gp.bin
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Use the tiboot3.bin generated from last command
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* 3.2 A53:
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.. code-block:: text
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$ make ARCH=arm CROSS_COMPILE=aarch64-none-linux-gnu- am62x_evm_a53_defconfig O=/tmp/a53
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$ make ARCH=arm CROSS_COMPILE=aarch64-none-linux-gnu- ATF=<path to ATF dir>/build/k3/lite/release/bl31.bin TEE=<path to OPTEE OS dir>/out/arm-plat-k3/core/tee-pager_v2.bin DM=<path to ti-linux-firmware>/ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f O=/tmp/a53
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Target Images
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--------------
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Copy the below images to an SD card and boot:
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- tiboot3.bin from step 3.1
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- tispl.bin, u-boot.img from 3.2
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Image formats:
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--------------
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- tiboot3.bin:
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.. code-block:: text
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+-----------------------+
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| X.509 |
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| Certificate |
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| +-------------------+ |
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| | R5 | |
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| | u-boot-spl.bin | |
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| +-------------------+ |
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| |TIFS with board cfg| |
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| +-------------------+ |
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| | FIT header | |
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| | +---------------+ | |
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| | | DTB 1...N | | |
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| | +---------------+ | |
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| +-------------------+ |
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+-----------------------+
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- tispl.bin
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.. code-block:: text
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+-----------------------+
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| FIT HEADER |
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| +-------------------+ |
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| | A53 ATF | |
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| +-------------------+ |
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| | A53 OPTEE | |
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| +-------------------+ |
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| | R5 DM FW | |
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| +-------------------+ |
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| | A53 SPL | |
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| +-------------------+ |
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| | SPL DTB 1...N | |
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| +-------------------+ |
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+-----------------------+
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