mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-17 10:18:38 +00:00
09f19f7770
Add DT bindings for slow clock driver. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
82 lines
1.7 KiB
Text
82 lines
1.7 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
/*
|
|
* sama7g5.dtsi - Device Tree Include file for SAMA7G5 SoC.
|
|
*
|
|
* Copyright (C) 2020 Microchip Technology Inc. and its subsidiaries
|
|
*
|
|
* Author: Eugen Hristev <eugen.hristev@microchip.com>
|
|
* Author: Claudiu Beznea <claudiu.beznea@microchip.com>
|
|
*
|
|
*/
|
|
|
|
#include "skeleton.dtsi"
|
|
|
|
/ {
|
|
model = "Microchip SAMA7G5 family SoC";
|
|
compatible = "microchip,sama7g5";
|
|
|
|
clocks {
|
|
slow_rc_osc: slow_rc_osc {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <32000>;
|
|
};
|
|
|
|
main_rc: main_rc {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <12000000>;
|
|
};
|
|
|
|
slow_xtal: slow_xtal {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
};
|
|
|
|
main_xtal: main_xtal {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
};
|
|
|
|
mck: mck {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <200000000>;
|
|
};
|
|
};
|
|
|
|
ahb {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
apb {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
clk32: sckc@e001d050 {
|
|
compatible = "microchip,sam9x60-sckc";
|
|
reg = <0xe001d050 0x4>;
|
|
clocks = <&slow_rc_osc>, <&slow_xtal>;
|
|
#clock-cells = <1>;
|
|
};
|
|
|
|
sdmmc1: sdio-host@e1208000 {
|
|
compatible = "microchip,sama7g5-sdhci";
|
|
reg = <0xe1208000 0x300>;
|
|
clocks = <&mck>, <&mck>, <&mck>;
|
|
clock-names = "hclock", "multclk", "baseclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
uart0: serial@e1824200 {
|
|
compatible = "atmel,at91sam9260-usart";
|
|
reg = <0xe1824200 0x200>;
|
|
clocks = <&mck>;
|
|
clock-names = "usart";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|
|
};
|