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Simon Glass 0990c894cc x86: fsp: Support a warning message when DRAM init is slow 
With DDR4, Intel SOCs take quite a long time to init their memory. During
this time, if the user is watching, it looks like SPL has hung. Add a
message in this case.

This works by adding a return code to fspm_update_config() that indicates
whether MRC data was found and a new property to the device tree.

Also add one more debug message while starting.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17 14:32:24 +08:00
..
arc common: Drop linux/bitops.h from common header 2020-05-18 21:19:23 -04:00
arm arm: k3: use correct weak function name spl_board_prepare_for_linux 2020-07-13 20:58:34 +05:30
m68k Remove CROSS_COMPILE default from arch/*/config.mk 2020-07-01 10:11:03 -04:00
microblaze Remove CROSS_COMPILE default from arch/*/config.mk 2020-07-01 10:11:03 -04:00
mips common: Drop linux/bitops.h from common header 2020-05-18 21:19:23 -04:00
nds32 Remove CROSS_COMPILE default from arch/*/config.mk 2020-07-01 10:11:03 -04:00
nios2 Remove CROSS_COMPILE default from arch/*/config.mk 2020-07-01 10:11:03 -04:00
powerpc Remove CROSS_COMPILE default from arch/*/config.mk 2020-07-01 10:11:03 -04:00
riscv Merge branch 'next' 2020-07-06 15:46:38 -04:00
sandbox sandbox: Move section u_boot_list to make it RW 2020-07-09 22:00:29 -06:00
sh Remove CROSS_COMPILE default from arch/*/config.mk 2020-07-01 10:11:03 -04:00
x86 x86: fsp: Support a warning message when DRAM init is slow 2020-07-17 14:32:24 +08:00
xtensa Remove CROSS_COMPILE default from arch/*/config.mk 2020-07-01 10:11:03 -04:00
.gitignore
Kconfig sandbox: move compression option to Kconfig 2020-05-25 11:54:53 -04:00
u-boot-elf.lds arch: Add explicit linker script for u-boot-elf 2020-04-03 11:52:55 -04:00