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a94a4071d4
Replace instances of http://www.ti.com with https://www.ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
126 lines
3.6 KiB
C
126 lines
3.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* OMAP EHCI port support
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* Based on LINUX KERNEL
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* drivers/usb/host/ehci-omap.c and drivers/mfd/omap-usb-host.c
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*
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* Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com*
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* Author: Govindraj R <govindraj.raja@ti.com>
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*/
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#ifndef _OMAP_COMMON_EHCI_H_
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#define _OMAP_COMMON_EHCI_H_
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enum usbhs_omap_port_mode {
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OMAP_USBHS_PORT_MODE_UNUSED,
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OMAP_EHCI_PORT_MODE_PHY,
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OMAP_EHCI_PORT_MODE_TLL,
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OMAP_EHCI_PORT_MODE_HSIC,
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};
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#define OMAP_HS_USB_PORTS 3
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#define is_ehci_phy_mode(x) ((x) == OMAP_EHCI_PORT_MODE_PHY)
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#define is_ehci_tll_mode(x) ((x) == OMAP_EHCI_PORT_MODE_TLL)
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#define is_ehci_hsic_mode(x) ((x) == OMAP_EHCI_PORT_MODE_HSIC)
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/* Values of UHH_REVISION - Note: these are not given in the TRM */
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#define OMAP_USBHS_REV1 0x00000010 /* OMAP3 */
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#define OMAP_USBHS_REV2 0x50700100 /* OMAP4 */
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#define OMAP_USBHS_REV2_1 0x50700101 /* OMAP5 */
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/* UHH Register Set */
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#define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN (1 << 2)
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#define OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN (1 << 3)
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#define OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN (1 << 4)
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#define OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN (1 << 5)
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#define OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS 1
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#define OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS (1 << 11)
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#define OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS (1 << 12)
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#define OMAP4_UHH_HOSTCONFIG_APP_START_CLK (1 << 31)
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#define OMAP_P1_MODE_CLEAR (3 << 16)
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#define OMAP_P1_MODE_TLL (1 << 16)
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#define OMAP_P1_MODE_HSIC (3 << 16)
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#define OMAP_P2_MODE_CLEAR (3 << 18)
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#define OMAP_P2_MODE_TLL (1 << 18)
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#define OMAP_P2_MODE_HSIC (3 << 18)
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#define OMAP_P3_MODE_CLEAR (3 << 20)
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#define OMAP_P3_MODE_HSIC (3 << 20)
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/* EHCI Register Set */
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#define EHCI_INSNREG04_DISABLE_UNSUSPEND (1 << 5)
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#define EHCI_INSNREG05_ULPI_CONTROL_SHIFT 31
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#define EHCI_INSNREG05_ULPI_PORTSEL_SHIFT 24
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#define EHCI_INSNREG05_ULPI_OPSEL_SHIFT 22
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#define EHCI_INSNREG05_ULPI_REGADD_SHIFT 16
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#define OMAP_REV1_TLL_CHANNEL_COUNT 3
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#define OMAP_REV2_TLL_CHANNEL_COUNT 2
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/* TLL Register Set */
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#define OMAP_TLL_CHANNEL_CONF(num) (0x004 * num)
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#define OMAP_TLL_CHANNEL_CONF_DRVVBUS (1 << 16)
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#define OMAP_TLL_CHANNEL_CONF_CHRGVBUS (1 << 15)
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#define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF (1 << 11)
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#define OMAP_TLL_CHANNEL_CONF_CHANMODE_TRANSPARENT_UTMI (2 << 1)
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#define OMAP_TLL_CHANNEL_CONF_CHANEN 1
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struct omap_usbhs_board_data {
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enum usbhs_omap_port_mode port_mode[OMAP_HS_USB_PORTS];
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};
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struct omap_usbtll {
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u32 rev; /* 0x00 */
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u32 hwinfo; /* 0x04 */
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u8 reserved1[0x8];
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u32 sysc; /* 0x10 */
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u32 syss; /* 0x14 */
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u32 irqst; /* 0x18 */
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u32 irqen; /* 0x1c */
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u8 reserved2[0x10];
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u32 shared_conf; /* 0x30 */
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u8 reserved3[0xc];
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u32 channel_conf; /* 0x40 */
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};
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struct omap_uhh {
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u32 rev; /* 0x00 */
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u32 hwinfo; /* 0x04 */
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u8 reserved1[0x8];
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u32 sysc; /* 0x10 */
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u32 syss; /* 0x14 */
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u8 reserved2[0x28];
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u32 hostconfig; /* 0x40 */
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u32 debugcsr; /* 0x44 */
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};
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struct omap_ehci {
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u32 hccapbase; /* 0x00 */
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u32 hcsparams; /* 0x04 */
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u32 hccparams; /* 0x08 */
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u8 reserved1[0x04];
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u32 usbcmd; /* 0x10 */
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u32 usbsts; /* 0x14 */
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u32 usbintr; /* 0x18 */
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u32 frindex; /* 0x1c */
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u32 ctrldssegment; /* 0x20 */
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u32 periodiclistbase; /* 0x24 */
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u32 asysnclistaddr; /* 0x28 */
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u8 reserved2[0x24];
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u32 configflag; /* 0x50 */
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u32 portsc_i; /* 0x54 */
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u8 reserved3[0x38];
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u32 insreg00; /* 0x90 */
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u32 insreg01; /* 0x94 */
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u32 insreg02; /* 0x98 */
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u32 insreg03; /* 0x9c */
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u32 insreg04; /* 0xa0 */
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u32 insreg05_utmi_ulpi; /* 0xa4 */
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u32 insreg06; /* 0xa8 */
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u32 insreg07; /* 0xac */
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u32 insreg08; /* 0xb0 */
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};
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#endif /* _OMAP_COMMON_EHCI_H_ */
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