mirror of
https://github.com/AsahiLinux/u-boot
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beeace9ba1
At the moment we have each SoC's memory map defined in its own cpu.h, which is included in include/configs/sunxi_common.h. This will be a problem with the introduction of Allwinner RISC-V support. Remove the inclusion of that header file from the common config header, instead move the required serial base addresses (for the SPL) into a separate header file. Then include the original cpu.h file only where we really need it, which is only under arch/arm now. This disentangles the architecture specific header files from the generic code. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
32 lines
920 B
C
32 lines
920 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* hardcoded UART base addresses for early SPL use
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*
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* Copyright (c) 2022 Arm Ltd.
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*/
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#ifndef SUNXI_SERIAL_MEMMAP_H
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#define SUNXI_SERIAL_MEMMAP_H
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#if defined(CONFIG_MACH_SUN9I)
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#define SUNXI_UART0_BASE 0x07000000
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#define SUNXI_R_UART_BASE 0x08002800
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#elif defined(CONFIG_SUN50I_GEN_H6)
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#define SUNXI_UART0_BASE 0x05000000
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#define SUNXI_R_UART_BASE 0x07080000
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#elif defined(CONFIG_MACH_SUNIV)
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#define SUNXI_UART0_BASE 0x01c25000
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#define SUNXI_R_UART_BASE 0
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#elif defined(CONFIG_SUNXI_GEN_NCAT2)
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#define SUNXI_UART0_BASE 0x02500000
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#define SUNXI_R_UART_BASE 0 // 0x07080000 (?>
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#else
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#define SUNXI_UART0_BASE 0x01c28000
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#define SUNXI_R_UART_BASE 0x01f02800
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#endif
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#define SUNXI_UART1_BASE (SUNXI_UART0_BASE + 0x400)
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#define SUNXI_UART2_BASE (SUNXI_UART0_BASE + 0x800)
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#define SUNXI_UART3_BASE (SUNXI_UART0_BASE + 0xc00)
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#endif /* SUNXI_SERIAL_MEMMAP_H */
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