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https://github.com/AsahiLinux/u-boot
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beeace9ba1
At the moment we have each SoC's memory map defined in its own cpu.h, which is included in include/configs/sunxi_common.h. This will be a problem with the introduction of Allwinner RISC-V support. Remove the inclusion of that header file from the common config header, instead move the required serial base addresses (for the SPL) into a separate header file. Then include the original cpu.h file only where we really need it, which is only under arch/arm now. This disentangles the architecture specific header files from the generic code. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
41 lines
1.1 KiB
C
41 lines
1.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2012 Henrik Nordstrom <henrik@henriknordstrom.net>
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*
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* (C) Copyright 2007-2011
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* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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* Tom Cubie <tangliang@allwinnertech.com>
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*
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* SRAM init for older sunxi SoCs.
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*/
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#include <common.h>
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#include <init.h>
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#include <asm/io.h>
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#include <asm/arch/cpu.h>
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void sunxi_sram_init(void)
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{
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/*
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* Undocumented magic taken from boot0, without this DRAM
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* access gets messed up (seems cache related).
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* The boot0 sources describe this as: "config ema for cache sram"
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* Newer SoCs (A83T, H3 and anything beyond) don't need this anymore.
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*/
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if (IS_ENABLED(CONFIG_MACH_SUN6I))
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setbits_le32(SUNXI_SRAMC_BASE + 0x44, 0x1800);
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if (IS_ENABLED(CONFIG_MACH_SUN8I)) {
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uint version = sunxi_get_sram_id();
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if (IS_ENABLED(CONFIG_MACH_SUN8I_A23)) {
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if (version == 0x1650)
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setbits_le32(SUNXI_SRAMC_BASE + 0x44, 0x1800);
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else /* 0x1661 ? */
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setbits_le32(SUNXI_SRAMC_BASE + 0x44, 0xc0);
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} else if (IS_ENABLED(CONFIG_MACH_SUN8I_A33)) {
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if (version != 0x1667)
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setbits_le32(SUNXI_SRAMC_BASE + 0x44, 0xc0);
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}
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}
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}
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