mirror of
https://github.com/AsahiLinux/u-boot
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177 lines
4 KiB
C
177 lines
4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2014-2018
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* Marcel Ziswiler <marcel@ziswiler.com>
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*/
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#include <common.h>
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#include <init.h>
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#include <log.h>
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#include <asm/arch/gp_padctrl.h>
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#include <asm/arch/pinmux.h>
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#include <asm/arch-tegra/ap.h>
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#include <asm/arch-tegra/tegra.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <dm.h>
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#include <i2c.h>
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#include <pci_tegra.h>
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#include "../common/tdx-common.h"
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#include "pinmux-config-apalis_t30.h"
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DECLARE_GLOBAL_DATA_PTR;
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#define PMU_I2C_ADDRESS 0x2D
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#define MAX_I2C_RETRY 3
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#ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT
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#define PEX_PERST_N TEGRA_GPIO(S, 7) /* Apalis GPIO7 */
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#define RESET_MOCI_CTRL TEGRA_GPIO(I, 4)
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static int pci_reset_status;
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#endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */
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int arch_misc_init(void)
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{
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if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) ==
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NVBOOTTYPE_RECOVERY)
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printf("USB recovery mode\n");
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return 0;
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}
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int checkboard(void)
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{
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printf("Model: Toradex Apalis T30 %dGB\n",
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(gd->ram_size == 0x40000000) ? 1 : 2);
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return 0;
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}
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#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
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int ft_board_setup(void *blob, bd_t *bd)
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{
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return ft_common_board_setup(blob, bd);
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}
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#endif
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/*
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* Routine: pinmux_init
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* Description: Do individual peripheral pinmux configs
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*/
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void pinmux_init(void)
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{
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pinmux_config_pingrp_table(tegra3_pinmux_common,
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ARRAY_SIZE(tegra3_pinmux_common));
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pinmux_config_pingrp_table(unused_pins_lowpower,
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ARRAY_SIZE(unused_pins_lowpower));
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/* Initialize any non-default pad configs (APB_MISC_GP regs) */
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pinmux_config_drvgrp_table(apalis_t30_padctrl,
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ARRAY_SIZE(apalis_t30_padctrl));
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}
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#ifdef CONFIG_PCI_TEGRA
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int tegra_pcie_board_init(void)
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{
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struct udevice *dev;
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u8 addr, data[1];
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int err;
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err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev);
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if (err) {
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debug("%s: Cannot find PMIC I2C chip\n", __func__);
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return err;
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}
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/* TPS659110: VDD2_OP_REG = 1.05V */
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data[0] = 0x27;
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addr = 0x25;
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err = dm_i2c_write(dev, addr, data, 1);
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if (err) {
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debug("failed to set VDD supply\n");
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return err;
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}
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/* TPS659110: VDD2_REG 7.5 mV/us, ACTIVE */
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data[0] = 0x0D;
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addr = 0x24;
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err = dm_i2c_write(dev, addr, data, 1);
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if (err) {
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debug("failed to enable VDD supply\n");
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return err;
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}
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/* TPS659110: LDO6_REG = 1.1V, ACTIVE */
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data[0] = 0x0D;
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addr = 0x35;
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err = dm_i2c_write(dev, addr, data, 1);
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if (err) {
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debug("failed to set AVDD supply\n");
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return err;
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}
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#ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT
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gpio_request(PEX_PERST_N, "PEX_PERST_N");
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gpio_request(RESET_MOCI_CTRL, "RESET_MOCI_CTRL");
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#endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */
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return 0;
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}
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void tegra_pcie_board_port_reset(struct tegra_pcie_port *port)
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{
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int index = tegra_pcie_port_index_of_port(port);
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if (index == 2) { /* I210 Gigabit Ethernet Controller (On-module) */
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tegra_pcie_port_reset(port);
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}
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#ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT
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/*
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* Apalis PCIe aka port 1 and Apalis Type Specific 4 Lane PCIe aka port
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* 0 share the same RESET_MOCI therefore only assert it once for both
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* ports to avoid losing the previously brought up port again.
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*/
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else if ((index == 1) || (index == 0)) {
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/* only do it once per init cycle */
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if (pci_reset_status % 2 == 0) {
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/*
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* Reset PLX PEX 8605 PCIe Switch plus PCIe devices on
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* Apalis Evaluation Board
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*/
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gpio_direction_output(PEX_PERST_N, 0);
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gpio_direction_output(RESET_MOCI_CTRL, 0);
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/*
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* Must be asserted for 100 ms after power and clocks
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* are stable
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*/
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mdelay(100);
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gpio_set_value(PEX_PERST_N, 1);
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/*
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* Err_5: PEX_REFCLK_OUTpx/nx Clock Outputs is not
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* Guaranteed Until 900 us After PEX_PERST# De-assertion
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*/
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mdelay(1);
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gpio_set_value(RESET_MOCI_CTRL, 1);
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}
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pci_reset_status++;
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}
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#endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */
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}
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#endif /* CONFIG_PCI_TEGRA */
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/*
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* Backlight off before OS handover
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*/
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void board_preboot_os(void)
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{
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gpio_request(TEGRA_GPIO(V, 2), "BKL1_ON");
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gpio_direction_output(TEGRA_GPIO(V, 2), 0);
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}
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