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https://github.com/AsahiLinux/u-boot
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25a5818ff8
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
50 lines
1.3 KiB
C
50 lines
1.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Alex Zuepke <azu@sysgo.de>
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*
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* (C) Copyright 2002
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* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
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*
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* (C) Copyright 2009
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* Ilya Yanok, Emcraft Systems Ltd, <yanok@emcraft.com>
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*
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* (C) Copyright 2009 DENX Software Engineering
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* Author: John Rigby <jrigby@gmail.com>
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* Add support for MX25
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*/
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#include <common.h>
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#include <init.h>
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/ptrace.h>
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/* nothing really to do with interrupts, just starts up a counter. */
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/* The 32KHz 32-bit timer overruns in 134217 seconds */
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int timer_init(void)
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{
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int i;
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struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE;
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struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
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/* setup GP Timer 1 */
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writel(GPT_CTRL_SWR, &gpt->ctrl);
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writel(readl(&ccm->cgr1) | CCM_CGR1_GPT1, &ccm->cgr1);
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for (i = 0; i < 100; i++)
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writel(0, &gpt->ctrl); /* We have no udelay by now */
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writel(0, &gpt->pre); /* prescaler = 1 */
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/* Freerun Mode, 32KHz input */
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writel(readl(&gpt->ctrl) | GPT_CTRL_CLKSOURCE_32 | GPT_CTRL_FRR,
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&gpt->ctrl);
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writel(readl(&gpt->ctrl) | GPT_CTRL_TEN, &gpt->ctrl);
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return 0;
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}
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