u-boot/drivers/ddr
Chris Packham 672e559830 ddr: marvell: update ddr controller init and freq
Update the calculation for tWR and tPD. This improves the DDR refresh
interval and brings the initialization into line with the binary blobs
currently being supplied by Marvell.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-19 16:30:29 +01:00
..
altera arm: socfpga: Convert Altera DDR SDRAM driver to use Kconfig 2017-04-14 14:06:57 +02:00
fsl armv8: ls1088a: Add NXP LS1088A SoC support 2017-09-11 08:00:13 -07:00
marvell ddr: marvell: update ddr controller init and freq 2018-01-19 16:30:29 +01:00
microchip drivers: ddr: Add DDR2 SDRAM controller driver for Microchip PIC32. 2016-02-01 22:14:01 +01:00
Kconfig arm: socfpga: Convert Altera DDR SDRAM driver to use Kconfig 2017-04-14 14:06:57 +02:00