mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-26 22:52:18 +00:00
1cc0a9f496
Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller
300 lines
10 KiB
C
300 lines
10 KiB
C
/*
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* (C) Copyright 2011 Logic Product Development <www.logicpd.com>
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* Peter Barada <peter.barada@logicpd.com>
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*
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* Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo
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* reference boards.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* High Level Configuration Options */
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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/*
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* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
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* 64 bytes before this address should be set aside for u-boot.img's
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* header. That is 0x800FFFC0--0x80100000 should not be used for any
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* other needs. We use this rather than the inherited defines from
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* ti_armv7_common.h for backwards compatibility.
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*/
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#define CONFIG_SYS_TEXT_BASE 0x80100000
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#define CONFIG_SPL_BSS_START_ADDR 0x80000000
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#define CONFIG_SPL_BSS_MAX_SIZE (512 << 10) /* 512 KB */
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#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
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#include <configs/ti_omap3_common.h>
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/* Override default SPL info to minimize empty space and allow BCH8 in SPL */
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#undef CONFIG_SPL_TEXT_BASE
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#undef CONFIG_SPL_MAX_SIZE
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#define CONFIG_SPL_TEXT_BASE 0x40200000
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#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE)
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/* Display CPU and Board information */
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_BOARD_LATE_INIT
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#define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_REVISION_TAG
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#define CONFIG_CMDLINE_EDITING /* cmd line edit/history */
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#define CONFIG_ZERO_BOOTDELAY_CHECK /* check keypress w/no delay */
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/* Hardware drivers */
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/* GPIO banks */
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#define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */
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#define CONFIG_USB_OMAP3
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/* select serial console configuration */
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#undef CONFIG_CONS_INDEX
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
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#define CONFIG_SERIAL1 1 /* UART1 on OMAP Logic boards */
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/* commands to include */
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
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/* I2C */
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#define CONFIG_SYS_I2C_OMAP34XX
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */
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#define EXPANSION_EEPROM_I2C_BUS 2 /* I2C Bus for AT24C64 */
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#define CONFIG_OMAP3_LOGIC_USE_NEW_PRODUCT_ID
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/* USB */
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#define CONFIG_USB_MUSB_OMAP2PLUS
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#define CONFIG_USB_MUSB_PIO_ONLY
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#define CONFIG_USB_ETHER
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#define CONFIG_USB_ETHER_RNDIS
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#define CONFIG_USB_FUNCTION_FASTBOOT
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#define CONFIG_CMD_FASTBOOT
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#define CONFIG_ANDROID_BOOT_IMAGE
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#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
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#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
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#define CONFIG_SYS_CACHELINE_SIZE 64
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/* TWL4030 */
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#define CONFIG_TWL4030_PWM
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#define CONFIG_TWL4030_USB
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/* Board NAND Info. */
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#ifdef CONFIG_NAND
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#define CONFIG_NAND_OMAP_GPMC
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#define CONFIG_CMD_UBI /* UBI-formated MTD partition support */
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#define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
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#define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
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#define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
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#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
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/* to access nand */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
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/* NAND devices */
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#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_PAGE_COUNT 64
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#define CONFIG_SYS_NAND_PAGE_SIZE 2048
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#define CONFIG_SYS_NAND_OOBSIZE 64
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#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
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#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
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13, 14, 16, 17, 18, 19, 20, 21, 22, \
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23, 24, 25, 26, 27, 28, 30, 31, 32, \
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33, 34, 35, 36, 37, 38, 39, 40, 41, \
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42, 44, 45, 46, 47, 48, 49, 50, 51, \
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52, 53, 54, 55, 56}
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#define CONFIG_SYS_NAND_ECCSIZE 512
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#define CONFIG_SYS_NAND_ECCBYTES 13
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#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
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#define CONFIG_BCH
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#define CONFIG_SYS_NAND_MAX_OOBFREE 2
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#define CONFIG_SYS_NAND_MAX_ECCPOS 56
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
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#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
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#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
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#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
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#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO),"\
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"1920k(u-boot),128k(u-boot-env),"\
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"4m(kernel),-(fs)"
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#endif
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/* Environment information */
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/*
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* PREBOOT assumes the 4.3" display is attached. User can interrupt
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* and modify display variable to suit their needs.
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*/
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#define CONFIG_PREBOOT \
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"echo ======================NOTICE============================;"\
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"echo \"The u-boot environment is not set.\";" \
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"echo \"If using a display a valid display variable for your panel\";" \
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"echo \"needs to be set.\";" \
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"echo \"Valid display options are:\";" \
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"echo \" 2 == LQ121S1DG31 TFT SVGA (12.1) Sharp\";" \
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"echo \" 3 == LQ036Q1DA01 TFT QVGA (3.6) Sharp w/ASIC\";" \
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"echo \" 5 == LQ064D343 TFT VGA (6.4) Sharp\";" \
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"echo \" 7 == LQ10D368 TFT VGA (10.4) Sharp\";" \
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"echo \" 15 == LQ043T1DG01 TFT WQVGA (4.3) Sharp (DEFAULT)\";" \
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"echo \" vga[-dvi or -hdmi] LCD VGA 640x480\";" \
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"echo \" svga[-dvi or -hdmi] LCD SVGA 800x600\";" \
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"echo \" xga[-dvi or -hdmi] LCD XGA 1024x768\";" \
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"echo \" 720p[-dvi or -hdmi] LCD 720P 1280x720\";" \
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"echo \"Defaulting to 4.3 LCD panel (display=15).\";" \
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"setenv display 15;" \
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"setenv preboot;" \
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"nand unlock;" \
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"saveenv;"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"loadaddr=0x81000000\0" \
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"uimage=uImage\0" \
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"zimage=zImage\0" \
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"mtdids=" MTDIDS_DEFAULT "\0" \
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"mtdparts=" MTDPARTS_DEFAULT "\0" \
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"mmcdev=0\0" \
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"mmcroot=/dev/mmcblk0p2 rw\0" \
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"mmcrootfstype=ext4 rootwait\0" \
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"nandroot=ubi0:rootfs rw ubi.mtd=fs noinitrd\0" \
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"nandrootfstype=ubifs rootwait\0" \
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"autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"else " \
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"run defaultboot;" \
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"fi; " \
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"else run defaultboot; fi\0" \
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"defaultboot=run mmcramboot\0" \
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"consoledevice=ttyO0\0" \
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"display=15\0" \
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"setconsole=setenv console ${consoledevice},${baudrate}n8\0" \
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"dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \
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"rotation=0\0" \
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"vrfb_arg=if itest ${rotation} -ne 0; then " \
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"setenv bootargs ${bootargs} omapfb.vrfb=y " \
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"omapfb.rotate=${rotation}; " \
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"fi\0" \
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"optargs=ignore_loglevel early_printk no_console_suspend\0" \
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"addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \
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"common_bootargs=setenv bootargs ${bootargs} display=${display} " \
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"${optargs};" \
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"run addmtdparts; " \
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"run vrfb_arg\0" \
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"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
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"bootscript=echo 'Running bootscript from mmc ...'; " \
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"source ${loadaddr}\0" \
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"loaduimage=mmc rescan; " \
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"fatload mmc ${mmcdev} ${loadaddr} ${uimage}\0" \
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"loadzimage=mmc rescan; " \
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"fatload mmc ${mmcdev} ${loadaddr} ${zimage}\0" \
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"ramdisksize=64000\0" \
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"ramdiskaddr=0x82000000\0" \
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"ramdiskimage=rootfs.ext2.gz.uboot\0" \
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"loadramdisk=mmc rescan; " \
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"fatload mmc ${mmcdev} ${ramdiskaddr} ${ramdiskimage}\0" \
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"ramargs=run setconsole; setenv bootargs console=${console} " \
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"root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \
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"mmcargs=run setconsole; setenv bootargs console=${console} " \
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"${optargs} " \
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"root=${mmcroot} " \
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"rootfstype=${mmcrootfstype}\0" \
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"nandargs=run setconsole; setenv bootargs console=${console} " \
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"${optargs} " \
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"root=${nandroot} " \
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"rootfstype=${nandrootfstype}\0" \
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"fdtaddr=0x86000000\0" \
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"loadfdtimage=mmc rescan; " \
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"fatload mmc ${mmcdev} ${fdtaddr} ${fdtimage}\0" \
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"mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \
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"run mmcargs; " \
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"run common_bootargs; " \
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"run dump_bootargs; " \
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"run loadzimage; " \
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"run loadfdtimage; " \
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"bootz ${loadaddr} - ${fdtaddr}\0" \
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"mmcramboot=echo 'Booting uImage kernel from mmc w/ramdisk...'; " \
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"run ramargs; " \
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"run common_bootargs; " \
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"run dump_bootargs; " \
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"run loaduimage; " \
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"run loadramdisk; " \
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"bootm ${loadaddr} ${ramdiskaddr}\0" \
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"mmcrambootz=echo 'Booting zImage kernel from mmc w/ramdisk...'; " \
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"run ramargs; " \
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"run common_bootargs; " \
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"run dump_bootargs; " \
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"run loadzimage; " \
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"run loadramdisk; " \
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"run loadfdtimage; " \
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"bootz ${loadaddr} ${ramdiskaddr} ${fdtaddr}\0; " \
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"tftpboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \
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"run ramargs; " \
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"run common_bootargs; " \
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"run dump_bootargs; " \
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"tftpboot ${loadaddr} ${uimage}; " \
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"tftpboot ${ramdiskaddr} ${ramdiskimage}; " \
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"bootm ${loadaddr} ${ramdiskaddr}\0"
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#define CONFIG_BOOTCOMMAND \
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"run autoboot"
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/* Miscellaneous configurable options */
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#define CONFIG_AUTO_COMPLETE
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/* memtest works on */
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#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
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#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
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0x01F00000) /* 31MB */
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/* FLASH and environment organization */
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/* **** PISMO SUPPORT *** */
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#if defined(CONFIG_CMD_NAND)
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#define CONFIG_SYS_FLASH_BASE NAND_BASE
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#elif defined(CONFIG_CMD_ONENAND)
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#define CONFIG_SYS_FLASH_BASE ONENAND_MAP
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#endif
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/* Monitor at start of flash */
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_ENV_IS_IN_NAND 1
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#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
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#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
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#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
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#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
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#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
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#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
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/* SMSC922x Ethernet */
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#if defined(CONFIG_CMD_NET)
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#define CONFIG_SMC911X
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#define CONFIG_SMC911X_32_BIT
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#define CONFIG_SMC911X_BASE 0x08000000
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#endif /* (CONFIG_CMD_NET) */
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/* Defines for SPL */
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#define CONFIG_SPL_OMAP3_ID_NAND
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/* NAND: SPL falcon mode configs */
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#ifdef CONFIG_SPL_OS_BOOT
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#define CONFIG_CMD_SPL_NAND_OFS 0x240000
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
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#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
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#endif
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#endif /* __CONFIG_H */
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