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074596c0b5
Barrier transactions from CCI400 need to be disabled till the DDR is configured, otherwise it may lead to system hang. The patch adds workaround to fix the erratum. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |
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.. | ||
fsl-layerscape | ||
hisilicon | ||
zynqmp | ||
cache.S | ||
cache_v8.c | ||
config.mk | ||
cpu.c | ||
exceptions.S | ||
fwcall.c | ||
generic_timer.c | ||
Kconfig | ||
Makefile | ||
start.S | ||
tlb.S | ||
transition.S | ||
u-boot-spl.lds | ||
u-boot.lds |