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a74e9d899d
Add SiFive fu740 cpu to support RISC-V arch Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
12 lines
225 B
Makefile
12 lines
225 B
Makefile
# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (C) 2020-2021 SiFive, Inc
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# Pragnesh Patel <pragnesh.patel@sifive.com>
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ifeq ($(CONFIG_SPL_BUILD),y)
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obj-y += spl.o
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else
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obj-y += dram.o
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obj-y += cpu.o
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obj-y += cache.o
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endif
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