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The PSIL endpoint data for J721E currently covers only the MCU domain CPSW0 instance. Add the data for the MAIN domain CPSW0 as well to allow the MAIN domain Ethernet ports to be usable on any platform using J721E SoC. Additionally, since J721E's PSIL endpoint data is applicable to J7200 SoC as well, the MAIN CPSW0 instance on J7200 will also be usable now. Signed-off-by: Suman Anna <s-anna@ti.com> [s-vadapalli@ti.com: Update commit message indicating support for J7200] Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> |
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| .. | ||
| k3-psil-am62.c | ||
| k3-psil-am64.c | ||
| k3-psil-am654.c | ||
| k3-psil-j721e.c | ||
| k3-psil-j721s2.c | ||
| k3-psil-priv.h | ||
| k3-psil.c | ||
| k3-psil.h | ||
| k3-udma-hwdef.h | ||
| k3-udma-u-boot.c | ||
| k3-udma.c | ||
| Kconfig | ||
| Makefile | ||