mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-30 16:39:35 +00:00
943be15974
We switch from custom boot commands relying on uEnv.txt to distro boot. This removes the automatic fpga bitstream loading in favor of loading bitstreams via custom bootscripts (boot.scr) or after booting the kernel. Acked-by: Patrick Bruenn <p.bruenn@beckhoff.com> Signed-off-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
105 lines
2.6 KiB
C
105 lines
2.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
/*
|
|
* Copyright (C) 2015 Beckhoff Automation GmbH & Co. KG
|
|
* Patrick Bruenn <p.bruenn@beckhoff.com>
|
|
*
|
|
* Configuration settings for Beckhoff CX9020.
|
|
*
|
|
* Based on Freescale's Linux i.MX mx53loco.h file:
|
|
* Copyright (C) 2010-2011 Freescale Semiconductor.
|
|
*/
|
|
|
|
#ifndef __CONFIG_H
|
|
#define __CONFIG_H
|
|
|
|
#include <asm/arch/imx-regs.h>
|
|
|
|
#define CONFIG_CMDLINE_TAG
|
|
#define CONFIG_SETUP_MEMORY_TAGS
|
|
#define CONFIG_INITRD_TAG
|
|
|
|
#define CONFIG_SYS_FSL_CLK
|
|
|
|
/* Size of malloc() pool */
|
|
#define CONFIG_SYS_MALLOC_LEN (32 * 1024 * 1024)
|
|
|
|
#define CONFIG_REVISION_TAG
|
|
|
|
#define CONFIG_MXC_UART_BASE UART2_BASE
|
|
|
|
#define CONFIG_FPGA_COUNT 1
|
|
|
|
/* MMC Configs */
|
|
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
|
|
#define CONFIG_SYS_FSL_ESDHC_NUM 2
|
|
|
|
/* bootz: zImage/initrd.img support */
|
|
|
|
|
|
/* USB Configs */
|
|
#define CONFIG_MXC_USB_PORT 1
|
|
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
|
|
#define CONFIG_MXC_USB_FLAGS 0
|
|
|
|
/* allow to overwrite serial and ethaddr */
|
|
#define CONFIG_ENV_OVERWRITE
|
|
|
|
/* Command definition */
|
|
|
|
#define CONFIG_LOADADDR 0x70010000 /* loadaddr env var */
|
|
|
|
#define BOOT_TARGET_DEVICES(func) \
|
|
func(MMC, mmc, 0) \
|
|
func(MMC, mmc, 1) \
|
|
func(USB, usb, 0) \
|
|
func(PXE, pxe, na)
|
|
|
|
#include <config_distro_bootcmd.h>
|
|
|
|
#define CONFIG_EXTRA_ENV_SETTINGS \
|
|
"fdt_addr_r=0x75000000\0" \
|
|
"pxefile_addr_r=0x73000000\0" \
|
|
"scriptaddr=0x74000000\0" \
|
|
"ramdisk_addr_r=0x80000000\0" \
|
|
"kernel_addr_r=0x72000000\0" \
|
|
"fdt_high=0xffffffff\0" \
|
|
"console=ttymxc1,115200\0" \
|
|
"stdin=serial\0" \
|
|
"stdout=serial,vidconsole\0" \
|
|
"stderr=serial,vidconsole\0" \
|
|
"fdtfile=imx53-cx9020.dtb\0" \
|
|
BOOTENV
|
|
|
|
#define CONFIG_ARP_TIMEOUT 200UL
|
|
|
|
/* Miscellaneous configurable options */
|
|
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
|
|
|
|
#define CONFIG_SYS_MEMTEST_START 0x70000000
|
|
#define CONFIG_SYS_MEMTEST_END 0x70010000
|
|
|
|
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
|
|
|
|
/* Physical Memory Map */
|
|
#define PHYS_SDRAM_1 CSD0_BASE_ADDR
|
|
#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
|
|
#define PHYS_SDRAM_2 CSD1_BASE_ADDR
|
|
#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
|
|
#define PHYS_SDRAM_SIZE (gd->ram_size)
|
|
|
|
#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
|
|
#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
|
|
#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
|
|
|
|
#define CONFIG_SYS_INIT_SP_OFFSET \
|
|
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
|
|
#define CONFIG_SYS_INIT_SP_ADDR \
|
|
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
|
|
|
|
/* environment organization */
|
|
#define CONFIG_SYS_MMC_ENV_DEV 0
|
|
|
|
/* Framebuffer and LCD */
|
|
#define CONFIG_IMX_VIDEO_SKIP
|
|
|
|
#endif /* __CONFIG_H */
|