mirror of
https://github.com/AsahiLinux/u-boot
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afc13335a5
The Qualcomm device trees in U-Boot are currently not consistent with the upstream DTs used in the Linux kernel. While some bindings are similar to the official specification in the Linux kernel, several nodes have subtle differences, e.g. the "compatible"s or the exact specification of memory registers. This means that some of the Qualcomm-related U-Boot drivers are not compatible with the Linux DT (and vice versa). The SPMI node is one such example: the "core" region starts at 0x0200f000 in the upstream Linux MSM8916 DT, but in U-Boot it starts at 0x0200f800. The end result is normally the same, since the Linux SPMI driver simply adds the 0x800 internally. However, commitf5a2d6b4b0("spmi: msm: add arbiter version 5 support") imported this behavior into the U-Boot driver, without adjusting the DB410c/DB820c device trees. This means that the 0x800 offset is now added twice, breaking all SPMI read/write operations: Failed to find PMIC pon node. Check device tree Failed to find pm8916_gpios@c000 node. USB init failed: -6 starting USB... Bus ehci@78d9000: Failed to find pm8916_gpios@c000 node. probe failed, error -6 No working controllers found While the mistake is strictly speaking in the spmi-msm driver, fix the issue by making the SPMI nodes in the DB410c/DB820c consistent with the upstream Linux DT instead. Ideally we should even go a step further by fixing the remaining uses of custom bindings in the U-Boot drivers and moving to using the Linux DTs as-is. This would likely avoid such mistakes in the future and would also make the porting process much easier. Cc: Dzmitry Sankouski <dsankouski@gmail.com> Fixes:f5a2d6b4b0("spmi: msm: add arbiter version 5 support") Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
204 lines
4 KiB
Text
204 lines
4 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Qualcomm APQ8016 based Dragonboard 410C board device tree source
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*
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* (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
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*/
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/dts-v1/;
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#include "skeleton64.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/pinctrl-snapdragon.h>
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/ {
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model = "Qualcomm Technologies, Inc. Dragonboard 410c";
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compatible = "qcom,dragonboard", "qcom,apq8016-sbc";
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qcom,msm-id = <0xce 0x0 0xf8 0x0 0xf9 0x0 0xfa 0x0 0xf7 0x0>;
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qcom,board-id = <0x10018 0x0>;
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#address-cells = <0x2>;
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#size-cells = <0x2>;
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aliases {
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usb0 = "/soc/ehci@78d9000";
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};
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memory {
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device_type = "memory";
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reg = <0 0x80000000 0 0x3da00000>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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smem_mem: smem_region@86300000 {
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reg = <0x0 0x86300000 0x0 0x100000>;
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no-map;
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};
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};
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chosen {
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stdout-path = "/soc/serial@78b0000";
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};
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smem {
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compatible = "qcom,smem";
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memory-region = <&smem_mem>;
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qcom,rpm-msg-ram = <&rpm_msg_ram>;
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};
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soc {
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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ranges = <0x0 0x0 0x0 0xffffffff>;
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compatible = "simple-bus";
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rpm_msg_ram: memory@60000 {
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compatible = "qcom,rpm-msg-ram";
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reg = <0x60000 0x8000>;
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};
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pinctrl: qcom,tlmm@1000000 {
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compatible = "qcom,tlmm-apq8016";
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reg = <0x1000000 0x400000>;
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blsp1_uart: uart {
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function = "blsp1_uart";
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pins = "GPIO_4", "GPIO_5";
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drive-strength = <DRIVE_STRENGTH_8MA>;
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bias-disable;
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};
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};
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clkc: qcom,gcc@1800000 {
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compatible = "qcom,gcc-apq8016";
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reg = <0x1800000 0x80000>;
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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};
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serial@78b0000 {
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compatible = "qcom,msm-uartdm-v1.4";
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reg = <0x78b0000 0x200>;
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clock = <&clkc 4>;
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pinctrl-names = "uart";
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pinctrl-0 = <&blsp1_uart>;
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};
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soc_gpios: pinctrl@1000000 {
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compatible = "qcom,apq8016-pinctrl";
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reg = <0x1000000 0x300000>;
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gpio-controller;
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gpio-count = <122>;
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gpio-bank-name="soc";
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#gpio-cells = <2>;
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};
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ehci@78d9000 {
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compatible = "qcom,ehci-host";
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reg = <0x78d9000 0x400>;
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phys = <&ehci_phy>;
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};
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ehci_phy: ehci_phy@78d9000 {
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compatible = "qcom,apq8016-usbphy";
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reg = <0x78d9000 0x400>;
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#phy-cells = <0>;
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};
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sdhci@07824000 {
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compatible = "qcom,sdhci-msm-v4";
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reg = <0x7824900 0x11c 0x7824000 0x800>;
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bus-width = <0x8>;
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index = <0x0>;
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non-removable;
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clock = <&clkc 0>;
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clock-frequency = <100000000>;
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};
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sdhci@07864000 {
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compatible = "qcom,sdhci-msm-v4";
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reg = <0x7864900 0x11c 0x7864000 0x800>;
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index = <0x1>;
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bus-width = <0x4>;
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clock = <&clkc 1>;
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clock-frequency = <200000000>;
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cd-gpios = <&soc_gpios 38 GPIO_ACTIVE_LOW>;
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};
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wcnss {
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bt {
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compatible="qcom,wcnss-bt";
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};
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wifi {
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compatible="qcom,wcnss-wlan";
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};
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};
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spmi_bus: spmi@200f000 {
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compatible = "qcom,spmi-pmic-arb";
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reg = <0x0200f000 0x001000>,
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<0x02400000 0x400000>,
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<0x02c00000 0x400000>,
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<0x03800000 0x200000>,
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<0x0200a000 0x002100>;
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reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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pmic0: pm8916@0 {
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compatible = "qcom,spmi-pmic";
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reg = <0x0 0x1>;
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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pm8916_pon: pm8916_pon@800 {
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compatible = "qcom,pm8916-pwrkey";
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reg = <0x800 0x96>;
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#gpio-cells = <2>;
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gpio-controller;
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};
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pm8916_gpios: pm8916_gpios@c000 {
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compatible = "qcom,pm8916-gpio";
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reg = <0xc000 0x400>;
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gpio-controller;
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gpio-count = <4>;
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#gpio-cells = <2>;
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gpio-bank-name="pmic";
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};
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};
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pmic1: pm8916@1 {
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compatible = "qcom,spmi-pmic";
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reg = <0x1 0x1>;
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};
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};
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};
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leds {
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compatible = "gpio-leds";
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user1 {
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label = "green:user1";
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gpios = <&soc_gpios 21 0>;
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};
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user2 {
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label = "green:user2";
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gpios = <&soc_gpios 120 0>;
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};
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user3 {
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label = "green:user3";
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gpios = <&pm8916_gpios 0 0>;
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};
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user4 {
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label = "green:user4";
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gpios = <&pm8916_gpios 1 0>;
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};
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};
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};
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#include "dragonboard410c-uboot.dtsi"
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