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https://github.com/AsahiLinux/u-boot
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9df5081740
Add support for versal platform by adding "xlnx,versal-reset" compatible string in zynqmp-reset driver. Reset numbering schema for versal is not same as zynqmp, so nr_reset and reset_id are set to zero. In case of assert/dessert, required device reset id is sent from respective driver through struct reset_ctl. Signed-off-by: T Karthik Reddy <t.karthik.reddy@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Link: https://lore.kernel.org/r/20220720095959.29610-2-ashok.reddy.soma@xilinx.com Signed-off-by: Michal Simek <michal.simek@amd.com>
215 lines
6.6 KiB
Text
215 lines
6.6 KiB
Text
menu "Reset Controller Support"
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config DM_RESET
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bool "Enable reset controllers using Driver Model"
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depends on DM && OF_CONTROL
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help
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Enable support for the reset controller driver class. Many hardware
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modules are equipped with a reset signal, typically driven by some
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reset controller hardware module within the chip. In U-Boot, reset
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controller drivers allow control over these reset signals. In some
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cases this API is applicable to chips outside the CPU as well,
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although driving such reset isgnals using GPIOs may be more
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appropriate in this case.
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config SANDBOX_RESET
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bool "Enable the sandbox reset test driver"
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depends on DM_MAILBOX && SANDBOX
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help
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Enable support for a test reset controller implementation, which
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simply accepts requests to reset various HW modules without actually
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doing anything beyond a little error checking.
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config STI_RESET
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bool "Enable the STi reset"
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depends on ARCH_STI
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help
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Support for reset controllers on STMicroelectronics STiH407 family SoCs.
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Say Y if you want to control reset signals provided by system config
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block.
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config STM32_RESET
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bool "Enable the STM32 reset"
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depends on ARCH_STM32 || ARCH_STM32MP
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help
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Support for reset controllers on STMicroelectronics STM32 family SoCs.
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This reset driver is compatible with STM32 F4/F7 and H7 SoCs.
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config TEGRA_CAR_RESET
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bool "Enable Tegra CAR-based reset driver"
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depends on TEGRA_CAR
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help
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Enable support for manipulating Tegra's on-SoC reset signals via
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direct register access to the Tegra CAR (Clock And Reset controller).
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config TEGRA186_RESET
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bool "Enable Tegra186 BPMP-based reset driver"
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depends on TEGRA186_BPMP
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help
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Enable support for manipulating Tegra's on-SoC reset signals via IPC
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requests to the BPMP (Boot and Power Management Processor).
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config RESET_TI_SCI
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bool "TI System Control Interface (TI SCI) reset driver"
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depends on DM_RESET && TI_SCI_PROTOCOL
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help
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This enables the reset driver support over TI System Control Interface
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available on some new TI's SoCs. If you wish to use reset resources
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managed by the TI System Controller, say Y here. Otherwise, say N.
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config RESET_BCM6345
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bool "Reset controller driver for BCM6345"
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depends on DM_RESET && ARCH_BMIPS
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help
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Support reset controller on BCM6345.
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config RESET_UNIPHIER
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bool "Reset controller driver for UniPhier SoCs"
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depends on ARCH_UNIPHIER
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default y
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help
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Support for reset controllers on UniPhier SoCs.
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Say Y if you want to control reset signals provided by System Control
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block, Media I/O block, Peripheral Block.
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config RESET_AST2500
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bool "Reset controller driver for AST2500 SoCs"
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depends on DM_RESET
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default y if ASPEED_AST2500
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help
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Support for reset controller on AST2500 SoC.
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Say Y if you want to control reset signals of different peripherals
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through System Control Unit (SCU).
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config RESET_AST2600
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bool "Reset controller driver for AST2600 SoCs"
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depends on DM_RESET
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default y if ASPEED_AST2600
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help
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Support for reset controller on AST2600 SoC.
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Say Y if you want to control reset signals of different peripherals
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through System Control Unit (SCU).
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config RESET_ROCKCHIP
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bool "Reset controller driver for Rockchip SoCs"
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depends on DM_RESET && ARCH_ROCKCHIP && CLK
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default y
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help
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Support for reset controller on rockchip SoC. The main limitation
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though is that some reset signals, like I2C or MISC reset multiple
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devices.
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config RESET_HSDK
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bool "Synopsys HSDK Reset Driver"
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depends on DM_RESET && TARGET_HSDK
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default y
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help
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This enables the reset controller driver for HSDK board.
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config RESET_MESON
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bool "Reset controller driver for Amlogic Meson SoCs"
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depends on DM_RESET && ARCH_MESON
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imply REGMAP
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default y
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help
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Support for reset controller on Amlogic Meson SoC.
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config RESET_SOCFPGA
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bool "Reset controller driver for SoCFPGA"
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depends on DM_RESET && ARCH_SOCFPGA
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default y
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help
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Support for reset controller on SoCFPGA platform.
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config RESET_MEDIATEK
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bool "Reset controller driver for MediaTek SoCs"
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depends on DM_RESET && ARCH_MEDIATEK && CLK
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default y
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help
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Support for reset controller on MediaTek SoCs.
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config RESET_MTMIPS
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bool "Reset controller driver for MediaTek MIPS platform"
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depends on DM_RESET && ARCH_MTMIPS
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default y
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help
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Support for reset controller on MediaTek MIPS platform.
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config RESET_SUNXI
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bool "RESET support for Allwinner SoCs"
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depends on DM_RESET && ARCH_SUNXI
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default y
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help
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This enables support for common reset driver for
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Allwinner SoCs.
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config RESET_HISILICON
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bool "Reset controller driver for HiSilicon SoCs"
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depends on DM_RESET
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help
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Support for reset controller on HiSilicon SoCs.
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config RESET_IMX7
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bool "i.MX7/8 Reset Driver"
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depends on DM_RESET && (ARCH_MX7 || ARCH_IMX8M)
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default y
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help
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Support for reset controller on i.MX7/8 SoCs.
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config RESET_IPQ419
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bool "Reset driver for Qualcomm IPQ40xx SoCs"
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depends on DM_RESET && ARCH_IPQ40XX
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default y
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help
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Support for reset controller on Qualcomm
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IPQ40xx SoCs.
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config RESET_SIFIVE
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bool "Reset Driver for SiFive SoC's"
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depends on DM_RESET && CLK_SIFIVE_PRCI && (TARGET_SIFIVE_UNLEASHED || TARGET_SIFIVE_UNMATCHED)
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default y
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help
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PRCI module within SiFive SoC's provides mechanism to reset
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different hw blocks like DDR, gemgxl. With this driver we leverage
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U-Boot's reset framework to reset these hardware blocks.
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config RESET_SYSCON
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bool "Enable generic syscon reset driver support"
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depends on DM_RESET
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help
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Support generic syscon mapped register reset devices.
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config RESET_RASPBERRYPI
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bool "Raspberry Pi 4 Firmware Reset Controller Driver"
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depends on DM_RESET && ARCH_BCM283X
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default USB_XHCI_PCI
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help
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Raspberry Pi 4's co-processor controls some of the board's HW
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initialization process, but it's up to Linux to trigger it when
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relevant. This driver provides a reset controller capable of
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interfacing with RPi4's co-processor and model these firmware
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initialization routines as reset lines.
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config RESET_SCMI
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bool "Enable SCMI reset domain driver"
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select SCMI_FIRMWARE
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help
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Enable this option if you want to support reset controller
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devices exposed by a SCMI agent based on SCMI reset domain
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protocol communication with a SCMI server.
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config RESET_ZYNQMP
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bool "Reset Driver for Xilinx ZynqMP & Versal SoC's"
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depends on DM_RESET && ZYNQMP_FIRMWARE
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help
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Support for reset controller on Xilinx ZynqMP & Versal SoC's. Driver
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is only passing request via Xilinx firmware interface to TF-A and PMU
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firmware.
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config RESET_DRA7
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bool "Support for TI's DRA7 Reset driver"
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depends on DM_RESET
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help
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Support for TI DRA7-RESET subsystem. Basic Assert/Deassert
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is supported.
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endmenu
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