u-boot/drivers/ddr/altera
Marek Vasut 88c3bb49e1 ddr: socfpga: Clean up ddr_setup()
Replace the current rather convoluted code using ad-hoc polling
mechanism with a more straightforward code. Use wait_for_bit_le32()
to poll the DDRCALSTAT register instead of local reimplementation.
It makes no sense to pull for 5 seconds before giving up and trying
to restart the EMIF, so instead wait 500 mSec for the calibration to
complete and if this fails, restart the EMIF and try again. Perform
this 32 times instead of 3 times as the original code did.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2019-03-09 23:25:19 +01:00
..
Kconfig configs: Add DDR Kconfig support for Arria 10 2018-05-18 10:30:47 +02:00
Makefile ddr: altera: stratix10: Add DDR support for Stratix10 SoC 2018-07-12 09:22:12 +02:00
sdram_arria10.c ddr: socfpga: Clean up ddr_setup() 2019-03-09 23:25:19 +01:00
sdram_gen5.c ARM: socfpga: Rename the gen5 sdram driver to more specific name 2018-05-18 10:30:47 +02:00
sdram_s10.c socfpga: stratix10: fix sdram_calculate_size 2018-09-15 03:17:01 +02:00
sequencer.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
sequencer.h SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00