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https://github.com/AsahiLinux/u-boot
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ab92b38a01
We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16. Introduce select statements for other architectures based on current usage. For MIPS, we take the existing arch-specific symbol and migrate to the generic symbol. This lets us remove a little bit of otherwise unused code. Cc: Alexey Brodkin <alexey.brodkin@synopsys.com> Cc: Anup Patel <anup.patel@wdc.com> Cc: Atish Patra <atish.patra@wdc.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Leo <ycliang@andestech.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
177 lines
3.2 KiB
Text
177 lines
3.2 KiB
Text
menu "mpc8xx CPU"
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depends on MPC8xx
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config SYS_CPU
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default "mpc8xx"
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choice
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prompt "Target select"
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optional
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config TARGET_MCR3000
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bool "Support MCR3000 board from CSSI"
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endchoice
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choice
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prompt "CPU select"
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default MPC866
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config MPC866
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bool "MPC866"
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select SYS_CACHE_SHIFT_4
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config MPC885
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bool "MPC885"
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select SYS_CACHE_SHIFT_4
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endchoice
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config 8xx_GCLK_FREQ
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int "CPU GCLK Frequency"
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comment "Specific commands"
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config CMD_IMMAP
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bool "Enable various commands to dump IMMR information"
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help
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This enables various commands such as:
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siuinfo - print System Interface Unit (SIU) registers
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memcinfo - print Memory Controller registers
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comment "Configuration Registers"
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config SYS_SIUMCR
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hex "SIUMCR register"
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help
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SIU Module Configuration (11-6)
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config SYS_SYPCR
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hex "SYPCR register"
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help
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System Protection Control (11-9)
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config SYS_TBSCR
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hex "TBSCR register"
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help
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Time Base Status and Control (11-26)
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config SYS_PISCR
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hex "PISCR register"
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help
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Periodic Interrupt Status and Control (11-31)
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config SYS_PLPRCR_BOOL
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bool "Customise PLPRCR"
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config SYS_PLPRCR
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hex "PLPRCR register"
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depends on SYS_PLPRCR_BOOL
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help
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PLL, Low-Power, and Reset Control Register (15-30)
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config SYS_SCCR
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hex "SCCR register"
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help
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System Clock and reset Control Register (15-27)
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config SYS_SCCR_MASK
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hex "MASK for setting SCCR register"
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config SYS_DER
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hex "DER register"
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help
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Debug Event Register (37-47)
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comment "Memory mapping"
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config SYS_BR0_PRELIM
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hex "Preliminary value for BR0"
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config SYS_OR0_PRELIM
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hex "Preliminary value for OR0"
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config SYS_BR1_PRELIM_BOOL
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bool "Define Bank 1"
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config SYS_BR1_PRELIM
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hex "Preliminary value for BR1"
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depends on SYS_BR1_PRELIM_BOOL
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config SYS_OR1_PRELIM
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hex "Preliminary value for OR1"
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depends on SYS_BR1_PRELIM_BOOL
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config SYS_BR2_PRELIM_BOOL
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bool "Define Bank 2"
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config SYS_BR2_PRELIM
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hex "Preliminary value for BR2"
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depends on SYS_BR2_PRELIM_BOOL
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config SYS_OR2_PRELIM
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hex "Preliminary value for OR2"
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depends on SYS_BR2_PRELIM_BOOL
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config SYS_BR3_PRELIM_BOOL
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bool "Define Bank 3"
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config SYS_BR3_PRELIM
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hex "Preliminary value for BR3"
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depends on SYS_BR3_PRELIM_BOOL
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config SYS_OR3_PRELIM
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hex "Preliminary value for OR3"
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depends on SYS_BR3_PRELIM_BOOL
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config SYS_BR4_PRELIM_BOOL
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bool "Define Bank 4"
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config SYS_BR4_PRELIM
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hex "Preliminary value for BR4"
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depends on SYS_BR4_PRELIM_BOOL
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config SYS_OR4_PRELIM
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hex "Preliminary value for OR4"
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depends on SYS_BR4_PRELIM_BOOL
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config SYS_BR5_PRELIM_BOOL
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bool "Define Bank 5"
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config SYS_BR5_PRELIM
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hex "Preliminary value for BR5"
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depends on SYS_BR5_PRELIM_BOOL
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config SYS_OR5_PRELIM
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hex "Preliminary value for OR5"
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depends on SYS_BR5_PRELIM_BOOL
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config SYS_BR6_PRELIM_BOOL
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bool "Define Bank 6"
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config SYS_BR6_PRELIM
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hex "Preliminary value for BR6"
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depends on SYS_BR6_PRELIM_BOOL
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config SYS_OR6_PRELIM
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hex "Preliminary value for OR6"
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depends on SYS_BR6_PRELIM_BOOL
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config SYS_BR7_PRELIM_BOOL
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bool "Define Bank 7"
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config SYS_BR7_PRELIM
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hex "Preliminary value for BR7"
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depends on SYS_BR7_PRELIM_BOOL
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config SYS_OR7_PRELIM
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hex "Preliminary value for OR7"
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depends on SYS_BR7_PRELIM_BOOL
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config SYS_IMMR
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hex "Value for IMMR"
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source "board/cssi/MCR3000/Kconfig"
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endmenu
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