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0f8106f8e0
Update Patrick and my email address with the one dedicated to upstream activities. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
40 lines
933 B
C
40 lines
933 B
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2017, STMicroelectronics - All Rights Reserved
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* Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics.
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*/
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#include <common.h>
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#include <init.h>
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#include <asm/io.h>
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#include <asm/armv7_mpu.h>
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int arch_cpu_init(void)
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{
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int i;
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struct mpu_region_config stm32_region_config[] = {
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/*
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* Make SDRAM area cacheable & executable.
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*/
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#if defined(CONFIG_STM32F4)
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{ 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
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O_I_WB_RD_WR_ALLOC, REGION_512MB },
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#endif
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{ 0x90000000, REGION_1, XN_DIS, PRIV_RW_USR_RW,
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SHARED_WRITE_BUFFERED, REGION_256MB },
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#if defined(CONFIG_STM32F7) || defined(CONFIG_STM32H7)
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{ 0xC0000000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
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O_I_WB_RD_WR_ALLOC, REGION_512MB },
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#endif
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};
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disable_mpu();
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for (i = 0; i < ARRAY_SIZE(stm32_region_config); i++)
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mpu_config(&stm32_region_config[i]);
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enable_mpu();
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return 0;
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}
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