Quentin Schulz 484a878273 arm: spear: fix enabling of SSP2 clock ... The SSP2 clock is at bit 6 in the register, so the value is 0x40 unlike the current 0x70 which enables the clock of UART2, SSP1 and SSP2. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Acked-by: Stefan Roese <sr@denx.de>		2018-09-25 21:49:18 -04:00
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clk.h
gpio.h
hardware.h
spr_defs.h
spr_emi.h
spr_gpt.h
spr_misc.h	arm: spear: fix enabling of SSP2 clock	2018-09-25 21:49:18 -04:00
spr_ssp.h
spr_syscntl.h