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u-boot/drivers/clk/rockchip
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Philipp Tomsich ba3bf3879e rockchip: clk: rk3399: 24MHz is not a power of 2 
The clock driver for the RK3399 mistakenly used (24 * 2^20) where it
should have used (24 * 10^6) in a few calculations.

This commits fixes this.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-04-04 20:01:57 -06:00
..
clk_rk3036.c rockchip: rk3036: Move rockchip_get_cru() out of the driver 2016-10-30 13:29:06 -06:00
clk_rk3188.c rockchip: clk: rk3188: Allow configuration of the armclk 2017-04-04 20:01:57 -06:00
clk_rk3288.c rockchip: clk: rk3288: limit gpll and cpll init to SPL build 2017-03-16 16:03:44 -06:00
clk_rk3328.c rockchip: rk3328: add clock driver 2017-03-16 16:03:46 -06:00
clk_rk3399.c rockchip: clk: rk3399: 24MHz is not a power of 2 2017-04-04 20:01:57 -06:00
Makefile rockchip: rk3328: add clock driver 2017-03-16 16:03:46 -06:00