Tom Rini cbe607b920 Xilinx changes for v2021.04-rc3 ... qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name -----BEGIN PGP SIGNATURE----- iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCYDUezQAKCRDKSWXLKUoM IbtgAJ9jZ+BOtwFaHR19TENC2DsHTINnnwCfSDn3fU0OFJRI0HD7pRxXr4xrb3M= =Kr8x -----END PGP SIGNATURE----- Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name		2021-02-23 10:45:55 -05:00
..
bootscripts	xilinx: Add sd boot command script for reference	2019-10-08 09:11:13 +02:00
common	Xilinx changes for v2021.04-rc3	2021-02-23 10:45:55 -05:00
microblaze-generic	common: Drop asm/global_data.h from common header	2021-02-02 15:33:42 -05:00
versal	common: Drop asm/global_data.h from common header	2021-02-02 15:33:42 -05:00
zynq	Xilinx changes for v2021.04-rc3	2021-02-23 10:45:55 -05:00
zynqmp	Xilinx changes for v2021.04-rc3	2021-02-23 10:45:55 -05:00
zynqmp_r5	common: Drop init.h from common header	2020-05-18 17:33:33 -04:00
Kconfig	xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM	2020-10-27 08:13:33 +01:00