mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-28 15:41:40 +00:00
dd11fdc31f
Perform simple renames of: CONFIG_MXC_USB_FLAGS to CFG_MXC_USB_FLAGS CONFIG_MXC_USB_PORT to CFG_MXC_USB_PORT CONFIG_MXC_USB_PORTSC to CFG_MXC_USB_PORTSC Signed-off-by: Tom Rini <trini@konsulko.com>
84 lines
2 KiB
C
84 lines
2 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2021 Ronetix GmbH
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*
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* Configuration settings for the Ronetix's iMX7-CM System-on-Module.
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*/
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#ifndef __IMX7_CM_CONFIG_H
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#define __IMX7_CM_CONFIG_H
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#include "mx7_common.h"
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#define CFG_MXC_UART_BASE UART1_IPS_BASE_ADDR
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#undef CFG_EXTRA_ENV_SETTINGS
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/*
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* Use:
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* boot-mode=mix
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* boot-mode=sd
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* boot-mode=net
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*/
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#define MY_CONFIG_BOOT_MODE "boot-mode=sd\0"
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#define CFG_EXTRA_ENV_SETTINGS \
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MY_CONFIG_BOOT_MODE \
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"image=zImage\0" \
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"console=ttymxc0\0" \
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"fdt_file=imx7-cm.dtb\0" \
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"fdt_addr=0x83000000\0" \
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"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
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"mmcpart=1\0" \
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"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
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"mmcargs=setenv bootargs console=${console},${baudrate} " \
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"root=${mmcroot}\0" \
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"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
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"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
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\
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"bootsd=" \
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"echo Booting from SD card ...; " \
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"run mmcargs; " \
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"mmc dev ${mmcdev};" \
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"run loadimage; " \
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"run loadfdt; " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"\0" \
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\
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"bootmix=" \
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"echo Boot Kernel and FDT from TFTP, RootFs from SD card ...; " \
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"run mmcargs; " \
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"mmc dev ${mmcdev};" \
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"tftp ${fdt_addr} ${fdt_file}; " \
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"tftp ${image}; " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"\0" \
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\
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"netargs=setenv bootargs console=${console},${baudrate} " \
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"root=/dev/nfs " \
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"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \
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"\0" \
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"bootnet=" \
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"echo Booting from net ...; " \
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"run netargs; " \
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"tftp ${image}; " \
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"tftp ${fdt_addr} ${fdt_file}; " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"\0"
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CFG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
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/* MMC Config*/
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#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
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#define CFG_SYS_FSL_USDHC_NUM 2
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/* USB Configs */
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#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#endif /* __CONFIG_H */
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